From: adrianhoyin.ng@altera.com
To: dinguyen@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, maz@kernel.org, tglx@linutronix.de,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: adrianhoyin.ng@altera.com
Subject: [PATCH 0/3] Add quirk to support address bus size limitation
Date: Fri, 16 May 2025 12:13:31 +0800 [thread overview]
Message-ID: <cover.1747368554.git.adrianhoyin.ng@altera.com> (raw)
From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
This patch set adds support for the address bus size limitation by
allocating buffers with in a 32 bit address range.
-Add device tree binding to enable a quirk to support a limited address
bus size.
-Update ITS node for Agilex5 with dma_32bit_quirk.
-Add implementation to configure gfp flags to allocate buffers within
32 bit addressable range when quirk is set.
Adrian Ng Ho Yin (3):
dt-bindings: interrupt-controller: arm,gic-v3-its: Add quirk to
support 32 bit addressable range
arm64: dts: socfpga: agilex5: Add dma_32bit_quirk in GIC ITS node
irqchip: gic-v3-its: add support for 32bit addressing
.../interrupt-controller/arm,gic-v3.yaml | 5 ++++
.../arm64/boot/dts/intel/socfpga_agilex5.dtsi | 1 +
drivers/irqchip/irq-gic-v3-its.c | 23 +++++++++++++++----
3 files changed, 25 insertions(+), 4 deletions(-)
--
2.49.GIT
next reply other threads:[~2025-05-16 4:14 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-16 4:13 adrianhoyin.ng [this message]
2025-05-16 4:13 ` [PATCH 1/3] dt-bindings: interrupt-controller: arm,gic-v3-its: Add quirk to support 32 bit addressable range adrianhoyin.ng
2025-05-16 4:13 ` [PATCH 2/3] arm64: dts: socfpga: agilex5: Add dma_32bit_quirk in GIC ITS node adrianhoyin.ng
2025-05-16 4:13 ` [PATCH 3/3] irqchip: gic-v3-its: add support for 32bit addressing adrianhoyin.ng
2025-05-16 7:03 ` [PATCH 0/3] Add quirk to support address bus size limitation Marc Zyngier
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