[PATCH v2 0/3] AT91 Low Power Mode adjustments

[PATCH v2 0/3] AT91 Low Power Mode adjustments

[Ryan.Wanner]

From: Ryan Wanner <Ryan.Wanner@microchip.com>

This patch set adds the Low Power Mode pin feature to the SAMA7 SoCs.

Changes v1 -> v2:
- The 2.5v regulator has been removed as it has been applied.
- Adjust the dt-binding to allow more than 1 phandle.
- Adjust the commit message to explain better what the Low power mode
  pin does.
- Simplify the how the lpm pin property is parsed from the DT.

Claudiu Beznea (2):
  ARM: at91: PM: implement selection of LPM
  ARM: dts: at91: sama7g5ek: add microchip,lpm-connection on shdwc node

Varshini Rajendran (1):
  dt-bindings: power: reset: atmel,sama5d2-shdwc: add lpm binding

 .../power/reset/atmel,sama5d2-shdwc.yaml      | 19 ++++
 .../arm/boot/dts/microchip/at91-sama7g5ek.dts |  1 +
 arch/arm/mach-at91/pm.c                       | 96 ++++++++++++++++++-
 arch/arm/mach-at91/pm.h                       |  1 +
 arch/arm/mach-at91/pm_data-offsets.c          |  1 +
 arch/arm/mach-at91/pm_suspend.S               | 48 +++++++++-
 6 files changed, 158 insertions(+), 8 deletions(-)

-- 
2.43.0

[PATCH v2 1/3] dt-bindings: power: reset: atmel,sama5d2-shdwc: add lpm binding

[Ryan.Wanner]

From: Varshini Rajendran <varshini.rajendran@microchip.com>

Add microchip,lpm-connection binding which allows to specify the devices
the SHDWC's Low Power Mode pin is connected to.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
[ryan.wanner@microchip.com: Add sam9x7-shdwc SoC to properties check]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
 .../power/reset/atmel,sama5d2-shdwc.yaml      | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
index 9c34249b2d6d..668b541eb44c 100644
--- a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
+++ b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
@@ -56,6 +56,13 @@ properties:
     description: enable real-time timer wake-up
     type: boolean
 
+  microchip,lpm-connection:
+    description:
+      List of phandles to devices which are connected to SHDWC's Low Power Mode Pin.
+      The LPM pin is used to idicate to an external power supply or device to enter
+      or exit a special powering state.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+
 patternProperties:
   "^input@[0-15]$":
     description:
@@ -96,6 +103,18 @@ allOf:
       properties:
         atmel,wakeup-rtt-timer: false
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - atmel,sama5d2-shdwc
+              - microchip,sam9x60-shdwc
+              - microchip,sam9x7-shdwc
+    then:
+      properties:
+        microchip,lpm-connection: false
+
 additionalProperties: false
 
 examples:
-- 
2.43.0

Re: [PATCH v2 1/3] dt-bindings: power: reset: atmel,sama5d2-shdwc: add lpm binding

[Conor Dooley]

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On Tue, Sep 16, 2025 at 12:50:30PM -0700, Ryan.Wanner@microchip.com wrote:
> From: Varshini Rajendran <varshini.rajendran@microchip.com>
> 
> Add microchip,lpm-connection binding which allows to specify the devices
> the SHDWC's Low Power Mode pin is connected to.
> 
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> [ryan.wanner@microchip.com: Add sam9x7-shdwc SoC to properties check]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
>  .../power/reset/atmel,sama5d2-shdwc.yaml      | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
> index 9c34249b2d6d..668b541eb44c 100644
> --- a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
> +++ b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
> @@ -56,6 +56,13 @@ properties:
>      description: enable real-time timer wake-up
>      type: boolean
>  
> +  microchip,lpm-connection:
> +    description:
> +      List of phandles to devices which are connected to SHDWC's Low Power Mode Pin.
> +      The LPM pin is used to idicate to an external power supply or device to enter
> +      or exit a special powering state.
> +    $ref: /schemas/types.yaml#/definitions/phandle-array

This sounds like you're some kind of power-domain provider. Why doesn't
that generic kind of thing work for you?

> +
>  patternProperties:
>    "^input@[0-15]$":
>      description:
> @@ -96,6 +103,18 @@ allOf:
>        properties:
>          atmel,wakeup-rtt-timer: false
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - atmel,sama5d2-shdwc
> +              - microchip,sam9x60-shdwc
> +              - microchip,sam9x7-shdwc
> +    then:
> +      properties:
> +        microchip,lpm-connection: false
> +
>  additionalProperties: false
>  
>  examples:
> -- 
> 2.43.0
> 

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Re: [PATCH v2 1/3] dt-bindings: power: reset: atmel,sama5d2-shdwc: add lpm binding

[Ryan Wanner]

On 9/17/25 12:38, Conor Dooley wrote:
> On Tue, Sep 16, 2025 at 12:50:30PM -0700, Ryan.Wanner@microchip.com wrote:
>> From: Varshini Rajendran <varshini.rajendran@microchip.com>
>>
>> Add microchip,lpm-connection binding which allows to specify the devices
>> the SHDWC's Low Power Mode pin is connected to.
>>
>> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
>> [ryan.wanner@microchip.com: Add sam9x7-shdwc SoC to properties check]
>> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
>> ---
>>  .../power/reset/atmel,sama5d2-shdwc.yaml      | 19 +++++++++++++++++++
>>  1 file changed, 19 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
>> index 9c34249b2d6d..668b541eb44c 100644
>> --- a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
>> +++ b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
>> @@ -56,6 +56,13 @@ properties:
>>      description: enable real-time timer wake-up
>>      type: boolean
>>  
>> +  microchip,lpm-connection:
>> +    description:
>> +      List of phandles to devices which are connected to SHDWC's Low Power Mode Pin.
>> +      The LPM pin is used to idicate to an external power supply or device to enter
>> +      or exit a special powering state.
>> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> 
> This sounds like you're some kind of power-domain provider. Why doesn't
> that generic kind of thing work for you?

This is used by the MPUs shutdown controller to toggle external things
that need to be disabled.

In the case of the SAMA7G5EK board it is used to disable the 24MHz
oscillator and the 25MHz oscillator for the GMAC1 phy.

From my understanding this is not a power-domain provider it is just
used to toggle devices to disable when the MPU is in a low power state
and to re-enable when the MPU is in a normal power state.

Ryan
> 
>> +
>>  patternProperties:
>>    "^input@[0-15]$":
>>      description:
>> @@ -96,6 +103,18 @@ allOf:
>>        properties:
>>          atmel,wakeup-rtt-timer: false
>>  
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - atmel,sama5d2-shdwc
>> +              - microchip,sam9x60-shdwc
>> +              - microchip,sam9x7-shdwc
>> +    then:
>> +      properties:
>> +        microchip,lpm-connection: false
>> +
>>  additionalProperties: false
>>  
>>  examples:
>> -- 
>> 2.43.0
>>

[PATCH v2 2/3] ARM: at91: PM: implement selection of LPM

[Ryan.Wanner]

From: Claudiu Beznea <claudiu.beznea@microchip.com>

The LPM shutdown controller output could signal the transition to PM
state for different devices connected on board. On different boards
LPM could be connected to different devices (e.g. on SAMA7G5-EK REV4
the LPM is connected to on main crystal oscillator, KSZ8081 PHY and
to MCP16502 PMIC). Toggling LPM on BSR PM mode is done unconditionally
and it helps PMIC to transition to a power saving mode. Toggling LPM
on ULP0 and ULP1 should be done conditionally based on user defined
wakeup sources, available wakeup source for PM mode and connections to
SHDWC's LPM pin. On ULP0 any device could act as wakeup sources. On ULP1
only some of the on SoC controllers could act as wakeup sources. For this
the architecture specific PM code parses board specific LPM devices,
check them against possible wakeup source (in case of ULP1) and tells
assembly code to act properly on SHDWC's LPM pin.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[ryan.wanner@microchip.com: Fixed conflicts when applying.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
 arch/arm/mach-at91/pm.c              | 96 +++++++++++++++++++++++++++-
 arch/arm/mach-at91/pm.h              |  1 +
 arch/arm/mach-at91/pm_data-offsets.c |  1 +
 arch/arm/mach-at91/pm_suspend.S      | 48 ++++++++++++--
 4 files changed, 138 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 35058b99069c..40052b06d979 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -116,6 +116,7 @@ struct at91_pm_quirks {
  * @config_shdwc_ws: wakeup sources configuration function for SHDWC
  * @config_pmc_ws: wakeup srouces configuration function for PMC
  * @ws_ids: wakup sources of_device_id array
+ * @shdwc_np: pointer to shdwc node
  * @bu: backup unit mapped data (for backup mode)
  * @quirks: PM quirks
  * @data: PM data to be used on last phase of suspend
@@ -126,6 +127,7 @@ struct at91_soc_pm {
 	int (*config_shdwc_ws)(void __iomem *shdwc, u32 *mode, u32 *polarity);
 	int (*config_pmc_ws)(void __iomem *pmc, u32 mode, u32 polarity);
 	const struct of_device_id *ws_ids;
+	struct device_node *shdwc_np;
 	struct at91_pm_bu *bu;
 	struct at91_pm_quirks quirks;
 	struct at91_pm_data data;
@@ -243,6 +245,82 @@ static const struct of_device_id sam9x7_ws_ids[] = {
 	{ /* sentinel */ }
 };
 
+static bool at91_pm_device_in_list(const struct platform_device *pdev,
+				   const struct of_device_id *ids)
+{
+	struct platform_device *local_pdev;
+	const struct of_device_id *match;
+	struct device_node *np;
+	int in_list = 0;
+
+	for_each_matching_node_and_match(np, ids, &match) {
+		local_pdev = of_find_device_by_node(np);
+		if (!local_pdev)
+			continue;
+
+		put_device(&local_pdev->dev);
+		if (pdev == local_pdev)
+			return true;
+	}
+
+	return false;
+}
+
+static int at91_pm_prepare_lpm(unsigned int pm_mode)
+{
+	struct platform_device *pdev;
+	int ndevices, i, ret;
+	struct of_phandle_args lpmspec;
+
+	if ((pm_mode != AT91_PM_ULP0 && pm_mode != AT91_PM_ULP1) ||
+	    !soc_pm.shdwc_np)
+		return 0;
+
+	ndevices = of_count_phandle_with_args(soc_pm.shdwc_np,
+					      "microchip,lpm-connection", NULL);
+	if (ndevices < 0)
+		return 0;
+
+	soc_pm.data.lpm = 1;
+	for (i = 0; i < ndevices; i++) {
+		ret = of_parse_phandle_with_args(soc_pm.shdwc_np,
+						 "microchip,lpm-connection",
+						 NULL, i, &lpmspec);
+		if (ret < 0) {
+			if (ret == -ENOENT) {
+				continue;
+			} else {
+				soc_pm.data.lpm = 0;
+				return ret;
+			}
+		}
+
+		pdev = of_find_device_by_node(lpmspec.np);
+		of_node_put(lpmspec.np);
+		if (!pdev)
+			continue;
+
+		if (device_may_wakeup(&pdev->dev)) {
+			if (pm_mode == AT91_PM_ULP1) {
+				/*
+				 * ULP1 wake-up sources are limited. Ignore it if not
+				 * in soc_pm.ws_ids.
+				 */
+				if (at91_pm_device_in_list(pdev, soc_pm.ws_ids))
+					soc_pm.data.lpm = 0;
+			} else {
+				soc_pm.data.lpm = 0;
+			}
+		}
+
+		put_device(&pdev->dev);
+		if (!soc_pm.data.lpm)
+			break;
+	}
+
+	return 0;
+}
+
 static int at91_pm_config_ws(unsigned int pm_mode, bool set)
 {
 	const struct wakeup_source_info *wsi;
@@ -481,10 +559,17 @@ static int at91_pm_begin(suspend_state_t state)
 		soc_pm.data.mode = -1;
 	}
 
-	ret = at91_pm_config_ws(soc_pm.data.mode, true);
+	ret = at91_pm_prepare_lpm(soc_pm.data.mode);
 	if (ret)
 		return ret;
 
+	ret = at91_pm_config_ws(soc_pm.data.mode, true);
+	if (ret) {
+		/* Revert LPM if any. */
+		soc_pm.data.lpm = 0;
+		return ret;
+	}
+
 	if (soc_pm.data.mode == AT91_PM_BACKUP)
 		soc_pm.bu->suspended = 1;
 	else if (soc_pm.bu)
@@ -1266,7 +1351,11 @@ static void __init at91_pm_modes_init(const u32 *maps, int len)
 			AT91_PM_REPLACE_MODES(maps, SHDWC);
 		} else {
 			soc_pm.data.shdwc = of_iomap(np, 0);
-			of_node_put(np);
+			/*
+			 * np is used further on suspend/resume path so we skip the
+			 * of_node_put(np) here.
+			 */
+			soc_pm.shdwc_np = np;
 		}
 	}
 
@@ -1669,7 +1758,8 @@ void __init sama7_pm_init(void)
 		AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP1, AT91_PM_BACKUP,
 	};
 	static const u32 iomaps[] __initconst = {
-		[AT91_PM_ULP0]		= AT91_PM_IOMAP(SFRBU),
+		[AT91_PM_ULP0]		= AT91_PM_IOMAP(SFRBU) |
+					  AT91_PM_IOMAP(SHDWC),
 		[AT91_PM_ULP1]		= AT91_PM_IOMAP(SFRBU) |
 					  AT91_PM_IOMAP(SHDWC) |
 					  AT91_PM_IOMAP(ETHC),
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 50c3a425d140..5707ff6ff444 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -40,6 +40,7 @@ struct at91_pm_data {
 	unsigned int pmc_mckr_offset;
 	unsigned int pmc_version;
 	unsigned int pmc_mcks;
+	unsigned int lpm;
 };
 #endif
 
diff --git a/arch/arm/mach-at91/pm_data-offsets.c b/arch/arm/mach-at91/pm_data-offsets.c
index 0ca5da66dc26..fb9651abdfdf 100644
--- a/arch/arm/mach-at91/pm_data-offsets.c
+++ b/arch/arm/mach-at91/pm_data-offsets.c
@@ -20,6 +20,7 @@ int main(void)
 						 pmc_version));
 	DEFINE(PM_DATA_PMC_MCKS,	offsetof(struct at91_pm_data,
 						 pmc_mcks));
+	DEFINE(PM_DATA_LPM,		offsetof(struct at91_pm_data, lpm));
 
 	return 0;
 }
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index 2e639f9ed648..b9b4208ff732 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -87,9 +87,30 @@ tmp3	.req	r6
 
 	.endm
 
-	.macro at91_backup_set_lpm reg
+/*
+ * Set LPM
+ * @ena: 0 - disable LPM
+ *	 1 - enable LPM
+ *
+ * Side effects: overwrites r7, r8, r9
+ */
+	.macro at91_set_lpm ena
 #ifdef CONFIG_SOC_SAMA7
-	orr	\reg, \reg, #0x200000
+	ldr	r7, .lpm
+	cmp	r7, #1
+	bne	21f
+	ldr	r7, .shdwc
+	cmp	r7, #0
+	beq	21f
+	mov	r8, #0xA5000000
+	add	r8, #0x200000
+	mov	r9, #\ena
+	cmp	r9, #1
+	beq	20f
+	add	r8, #0x200000
+20:
+	str	r8, [r7]
+21:
 #endif
 	.endm
 
@@ -479,7 +500,7 @@ sr_dis_exit:
 	ldr	tmp1, [pmc, #AT91_PMC_SR]
 	str	tmp1, .saved_osc_status
 	tst	tmp1, #AT91_PMC_MOSCRCS
-	bne	1f
+	bne	7f
 
 	/* Turn off RC oscillator */
 	ldr	tmp1, [pmc, #AT91_CKGR_MOR]
@@ -493,6 +514,9 @@ sr_dis_exit:
 	tst	tmp1, #AT91_PMC_MOSCRCS
 	bne	2b
 
+	/* Enable LPM. */
+7:	at91_set_lpm 1
+
 	/* Wait for interrupt */
 1:	at91_cpu_idle
 
@@ -510,7 +534,9 @@ sr_dis_exit:
 	wait_mckrdy tmp3
 	b	6f
 
-5:	/* Restore RC oscillator state */
+5:	at91_set_lpm 0
+
+	/* Restore RC oscillator state */
 	ldr	tmp1, .saved_osc_status
 	tst	tmp1, #AT91_PMC_MOSCRCS
 	beq	4f
@@ -588,6 +614,9 @@ sr_dis_exit:
 
 	wait_mckrdy tmp3
 
+	/* Enable LPM */
+	at91_set_lpm 1
+
 	/* Enter the ULP1 mode by set WAITMODE bit in CKGR_MOR */
 	ldr	tmp1, [pmc, #AT91_CKGR_MOR]
 	orr	tmp1, tmp1, #AT91_PMC_WAITMODE
@@ -601,6 +630,9 @@ sr_dis_exit:
 
 	wait_mckrdy tmp3
 
+	/* Disable LPM. */
+	at91_set_lpm 0
+
 	/* Enable the crystal oscillator */
 	ldr	tmp1, [pmc, #AT91_CKGR_MOR]
 	orr	tmp1, tmp1, #AT91_PMC_MOSCEN
@@ -1054,7 +1086,9 @@ ulp_exit:
 	ldr	r0, .shdwc
 	mov	tmp1, #0xA5000000
 	add	tmp1, tmp1, #0x1
-	at91_backup_set_lpm tmp1
+#ifdef CONFIG_SOC_SAMA7
+	orr	tmp1, tmp1, #0x200000
+#endif
 	str	tmp1, [r0, #0]
 .endm
 
@@ -1088,6 +1122,8 @@ ENTRY(at91_pm_suspend_in_sram)
 #ifdef CONFIG_SOC_SAMA7
 	ldr	tmp1, [r0, #PM_DATA_PMC_MCKS]
 	str	tmp1, .mcks
+	ldr	tmp1, [r0, #PM_DATA_LPM]
+	str	tmp1, .lpm
 #endif
 
 	/*
@@ -1179,6 +1215,8 @@ ENDPROC(at91_pm_suspend_in_sram)
 #ifdef CONFIG_SOC_SAMA7
 .mcks:
 	.word 0
+.lpm:
+	.word 0
 #endif
 .saved_mckr:
 	.word 0
-- 
2.43.0

Re: [PATCH v2 2/3] ARM: at91: PM: implement selection of LPM

[Claudiu Beznea]

On 9/16/25 22:50, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@microchip.com>
> 
> The LPM shutdown controller output could signal the transition to PM
> state for different devices connected on board. On different boards
> LPM could be connected to different devices (e.g. on SAMA7G5-EK REV4
> the LPM is connected to on main crystal oscillator, KSZ8081 PHY and
> to MCP16502 PMIC). Toggling LPM on BSR PM mode is done unconditionally
> and it helps PMIC to transition to a power saving mode. Toggling LPM
> on ULP0 and ULP1 should be done conditionally based on user defined
> wakeup sources, available wakeup source for PM mode and connections to
> SHDWC's LPM pin. On ULP0 any device could act as wakeup sources. On ULP1
> only some of the on SoC controllers could act as wakeup sources. For this
> the architecture specific PM code parses board specific LPM devices,
> check them against possible wakeup source (in case of ULP1) and tells
> assembly code to act properly on SHDWC's LPM pin.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> [ryan.wanner@microchip.com: Fixed conflicts when applying.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

[PATCH v2 3/3] ARM: dts: at91: sama7g5ek: add microchip,lpm-connection on shdwc node

[Ryan.Wanner]

From: Claudiu Beznea <claudiu.beznea@microchip.com>

Add microchip,lpm-connection binding to shdwc node. On SAMA7G5-EK REV4
LPM is connected to GMAC1's PHY, 24MHz oscillator and PMIC. On board
PMIC is not listed here as it is only treated on BSR mode
uncoditionally.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
 arch/arm/boot/dts/microchip/at91-sama7g5ek.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
index 3924f62ff0fb..50e9a5a5732a 100644
--- a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
+++ b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
@@ -872,6 +872,7 @@ &sdmmc2 {
 
 &shdwc {
 	debounce-delay-us = <976>;
+	microchip,lpm-connection = <&gmac1 &main_xtal>;
 	status = "okay";
 
 	input@0 {
-- 
2.43.0