[PATCH 0/4] i3c: dw: Add support for Device NACK Retry count

[adrianhoyin.ng@altera.com]

From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>

This series adds support for configuring the Device NACK Retry count
in the Synopsys DesignWare I3C master controller and enables the
corresponding property in the Altera Agilex5 device tree.

Some I3C slave devices may temporarily NACK transactions when they are
busy or not ready to respond. To enhance bus reliability, the DesignWare
I3C controller supports a programmable retry mechanism that automatically
reissues NACKed transactions. This series introduces the
snps,dev-nack-retry-cnt device tree property to configure this retry
count. The value is written into the Device Address Table (DAT) entry for
each I3C device, enabling fine-grained control of retry behavior.

This series also fixes an issue where existing DAT entries could be
overwritten when the driver restores device addresses. Update
dw_i3c_master_restore_addrs to preserve existing bits in each
DAT entry when restoring addresses.

Adrian Ng Ho Yin (4):
  dt-bindings: i3c: Add snps,dev-nack-retry-cnt property to Synopsys I3C
    master
  arm64: dts: intel: agilex5: Add snps,dev-nack-retry-cnt property for
    I3C controllers
  i3c: dw: Add support for Device NACK Retry count
  i3c: dw: Preserve DAT entry bits when restoring addresses

 .../bindings/i3c/snps,dw-i3c-master.yaml      |  8 ++++
 .../arm64/boot/dts/intel/socfpga_agilex5.dtsi |  2 +
 drivers/i3c/master/dw-i3c-master.c            | 40 ++++++++++++++++++-
 drivers/i3c/master/dw-i3c-master.h            |  1 +
 4 files changed, 49 insertions(+), 2 deletions(-)

-- 
2.49.GIT