[PATCH 0/6] iio: adc: ad4080: add support for AD4082, AD4085 and AD4088

[PATCH 0/6] iio: adc: ad4080: add support for AD4082, AD4085 and AD4088

[Antoniu Miclaus]

Add support for AD4082, AD4085 and AD4088 SAR ADCs to the existing
ad4080 driver:

- AD4082: 20-bit SAR ADC with LVDS CNV clock count max of 8
- AD4085: 16-bit SAR ADC with LVDS CNV clock count max of 8
- AD4088: 14-bit SAR ADC with LVDS CNV clock count max of 8

These devices share the same register map as AD4080 but differ in
resolution and LVDS CNV clock count maximum values.

Antoniu Miclaus (6):
  dt-bindings: iio: adc: adi,ad4080: add support for AD4082
  iio: adc: ad4080: add support for AD4082
  dt-bindings: iio: adc: adi,ad4080: add support for AD4085
  iio: adc: ad4080: add support for AD4085
  dt-bindings: iio: adc: adi,ad4080: add support for AD4088
  iio: adc: ad4080: add support for AD4088

 .../bindings/iio/adc/adi,ad4080.yaml          |  3 ++
 drivers/iio/adc/ad4080.c                      | 45 +++++++++++++++++++
 2 files changed, 48 insertions(+)

-- 
2.43.0

[PATCH 1/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4082

[Antoniu Miclaus]

Add device tree binding support for the AD4082 20-bit SAR ADC.
Add adi,ad4082 to the compatible enum.

A fallback compatible string to adi,ad4080 is not appropriate as the
AD4082 has a different LVDS CNV clock count maximum (8 vs 7), requiring
different driver configuration.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index ccd6a0ac1539..eeabf99f9a12 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -27,6 +27,7 @@ properties:
     enum:
       - adi,ad4080
       - adi,ad4081
+      - adi,ad4082
       - adi,ad4083
       - adi,ad4084
       - adi,ad4086
-- 
2.43.0

[PATCH 2/6] iio: adc: ad4080: add support for AD4082

[Antoniu Miclaus]

Add support for AD4082 20-bit SAR ADC. The AD4082 has the same
resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
maximum (8 vs 7).

Changes:
- Add AD4082_CHIP_ID definition (0x0052)
- Create ad4082_channel with 20-bit resolution and 32-bit storage
- Add ad4082_chip_info with lvds_cnv_clk_cnt_max = 8
- Register AD4082 in device ID and OF match tables

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 drivers/iio/adc/ad4080.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 7cf3b6ed7940..7cbbe284dea7 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -127,6 +127,7 @@
 #define AD4080_SPI_READ						BIT(7)
 #define AD4080_CHIP_ID						0x0050
 #define AD4081_CHIP_ID						0x0051
+#define AD4082_CHIP_ID						0x0052
 #define AD4083_CHIP_ID						0x0053
 #define AD4084_CHIP_ID						0x0054
 #define AD4086_CHIP_ID						0x0056
@@ -442,6 +443,8 @@ static const struct iio_chan_spec ad4080_channel = AD4080_CHANNEL_DEFINE(20, 32)
 
 static const struct iio_chan_spec ad4081_channel = AD4080_CHANNEL_DEFINE(20, 32);
 
+static const struct iio_chan_spec ad4082_channel = AD4080_CHANNEL_DEFINE(20, 32);
+
 static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16);
 
 static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
@@ -470,6 +473,16 @@ static const struct ad4080_chip_info ad4081_chip_info = {
 	.lvds_cnv_clk_cnt_max = 2,
 };
 
+static const struct ad4080_chip_info ad4082_chip_info = {
+	.name = "ad4082",
+	.product_id = AD4082_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 1,
+	.channels = &ad4082_channel,
+	.lvds_cnv_clk_cnt_max = 8,
+};
+
 static const struct ad4080_chip_info ad4083_chip_info = {
 	.name = "ad4083",
 	.product_id = AD4083_CHIP_ID,
@@ -666,6 +679,7 @@ static int ad4080_probe(struct spi_device *spi)
 static const struct spi_device_id ad4080_id[] = {
 	{ "ad4080", (kernel_ulong_t)&ad4080_chip_info },
 	{ "ad4081", (kernel_ulong_t)&ad4081_chip_info },
+	{ "ad4082", (kernel_ulong_t)&ad4082_chip_info },
 	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
 	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
 	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
@@ -677,6 +691,7 @@ MODULE_DEVICE_TABLE(spi, ad4080_id);
 static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4080", &ad4080_chip_info },
 	{ .compatible = "adi,ad4081", &ad4081_chip_info },
+	{ .compatible = "adi,ad4082", &ad4082_chip_info },
 	{ .compatible = "adi,ad4083", &ad4083_chip_info },
 	{ .compatible = "adi,ad4084", &ad4084_chip_info },
 	{ .compatible = "adi,ad4086", &ad4086_chip_info },
-- 
2.43.0

[PATCH 3/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4085

[Antoniu Miclaus]

Add device tree binding support for the AD4085 16-bit SAR ADC.
Add adi,ad4085 to the compatible enum.

A fallback compatible string to adi,ad4080 is not appropriate as the
AD4085 has a different LVDS CNV clock count maximum (8 vs 7), requiring
different driver configuration.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index eeabf99f9a12..106267aee195 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -30,6 +30,7 @@ properties:
       - adi,ad4082
       - adi,ad4083
       - adi,ad4084
+      - adi,ad4085
       - adi,ad4086
       - adi,ad4087
 
-- 
2.43.0

[PATCH 4/6] iio: adc: ad4080: add support for AD4085

[Antoniu Miclaus]

Add support for AD4085 16-bit SAR ADC. The AD4085 has the same
resolution as AD4084 (16-bit) but differs in LVDS CNV clock count
maximum (8 vs 2).

Changes:
- Add AD4085_CHIP_ID definition (0x0055)
- Create ad4085_channel with 16-bit resolution and 16-bit storage
- Add ad4085_chip_info with lvds_cnv_clk_cnt_max = 8
- Register AD4085 in device ID and OF match tables

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 drivers/iio/adc/ad4080.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 7cbbe284dea7..728df626f09e 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -130,6 +130,7 @@
 #define AD4082_CHIP_ID						0x0052
 #define AD4083_CHIP_ID						0x0053
 #define AD4084_CHIP_ID						0x0054
+#define AD4085_CHIP_ID						0x0055
 #define AD4086_CHIP_ID						0x0056
 #define AD4087_CHIP_ID						0x0057
 
@@ -449,6 +450,8 @@ static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16)
 
 static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
 
+static const struct iio_chan_spec ad4085_channel = AD4080_CHANNEL_DEFINE(16, 16);
+
 static const struct iio_chan_spec ad4086_channel = AD4080_CHANNEL_DEFINE(14, 16);
 
 static const struct iio_chan_spec ad4087_channel = AD4080_CHANNEL_DEFINE(14, 16);
@@ -503,6 +506,16 @@ static const struct ad4080_chip_info ad4084_chip_info = {
 	.lvds_cnv_clk_cnt_max = 2,
 };
 
+static const struct ad4080_chip_info ad4085_chip_info = {
+	.name = "ad4085",
+	.product_id = AD4085_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 1,
+	.channels = &ad4085_channel,
+	.lvds_cnv_clk_cnt_max = 8,
+};
+
 static const struct ad4080_chip_info ad4086_chip_info = {
 	.name = "ad4086",
 	.product_id = AD4086_CHIP_ID,
@@ -682,6 +695,7 @@ static const struct spi_device_id ad4080_id[] = {
 	{ "ad4082", (kernel_ulong_t)&ad4082_chip_info },
 	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
 	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
+	{ "ad4085", (kernel_ulong_t)&ad4085_chip_info },
 	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
 	{ "ad4087", (kernel_ulong_t)&ad4087_chip_info },
 	{ }
@@ -694,6 +708,7 @@ static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4082", &ad4082_chip_info },
 	{ .compatible = "adi,ad4083", &ad4083_chip_info },
 	{ .compatible = "adi,ad4084", &ad4084_chip_info },
+	{ .compatible = "adi,ad4085", &ad4085_chip_info },
 	{ .compatible = "adi,ad4086", &ad4086_chip_info },
 	{ .compatible = "adi,ad4087", &ad4087_chip_info },
 	{ }
-- 
2.43.0

[PATCH 5/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4088

[Antoniu Miclaus]

Add device tree binding support for the AD4088 14-bit SAR ADC.
Add adi,ad4088 to the compatible enum.

A fallback compatible string to adi,ad4080 is not appropriate as the
AD4088 has a different LVDS CNV clock count maximum (8 vs 7), requiring
different driver configuration.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index 106267aee195..79df2696ef24 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -33,6 +33,7 @@ properties:
       - adi,ad4085
       - adi,ad4086
       - adi,ad4087
+      - adi,ad4088
 
   reg:
     maxItems: 1
-- 
2.43.0

[PATCH 6/6] iio: adc: ad4080: add support for AD4088

[Antoniu Miclaus]

Add support for AD4088 14-bit SAR ADC. The AD4088 has the same
resolution as AD4087 (14-bit) but differs in LVDS CNV clock count
maximum (8 vs 1).

Changes:
- Add AD4088_CHIP_ID definition (0x0058)
- Create ad4088_channel with 14-bit resolution and 16-bit storage
- Add ad4088_chip_info with lvds_cnv_clk_cnt_max = 8
- Register AD4088 in device ID and OF match tables

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 drivers/iio/adc/ad4080.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 728df626f09e..fc261d3d7687 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -133,6 +133,7 @@
 #define AD4085_CHIP_ID						0x0055
 #define AD4086_CHIP_ID						0x0056
 #define AD4087_CHIP_ID						0x0057
+#define AD4088_CHIP_ID						0x0058
 
 #define AD4080_LVDS_CNV_CLK_CNT_MAX				7
 
@@ -456,6 +457,8 @@ static const struct iio_chan_spec ad4086_channel = AD4080_CHANNEL_DEFINE(14, 16)
 
 static const struct iio_chan_spec ad4087_channel = AD4080_CHANNEL_DEFINE(14, 16);
 
+static const struct iio_chan_spec ad4088_channel = AD4080_CHANNEL_DEFINE(14, 16);
+
 static const struct ad4080_chip_info ad4080_chip_info = {
 	.name = "ad4080",
 	.product_id = AD4080_CHIP_ID,
@@ -536,6 +539,16 @@ static const struct ad4080_chip_info ad4087_chip_info = {
 	.lvds_cnv_clk_cnt_max = 1,
 };
 
+static const struct ad4080_chip_info ad4088_chip_info = {
+	.name = "ad4088",
+	.product_id = AD4088_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 1,
+	.channels = &ad4088_channel,
+	.lvds_cnv_clk_cnt_max = 8,
+};
+
 static int ad4080_setup(struct iio_dev *indio_dev)
 {
 	struct ad4080_state *st = iio_priv(indio_dev);
@@ -698,6 +711,7 @@ static const struct spi_device_id ad4080_id[] = {
 	{ "ad4085", (kernel_ulong_t)&ad4085_chip_info },
 	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
 	{ "ad4087", (kernel_ulong_t)&ad4087_chip_info },
+	{ "ad4088", (kernel_ulong_t)&ad4088_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(spi, ad4080_id);
@@ -711,6 +725,7 @@ static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4085", &ad4085_chip_info },
 	{ .compatible = "adi,ad4086", &ad4086_chip_info },
 	{ .compatible = "adi,ad4087", &ad4087_chip_info },
+	{ .compatible = "adi,ad4088", &ad4088_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ad4080_of_match);
-- 
2.43.0

Re: [PATCH 2/6] iio: adc: ad4080: add support for AD4082

[Andy Shevchenko]

On Fri, Feb 06, 2026 at 03:08:21PM +0200, Antoniu Miclaus wrote:
> Add support for AD4082 20-bit SAR ADC. The AD4082 has the same
> resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
> maximum (8 vs 7).

> Changes:
> - Add AD4082_CHIP_ID definition (0x0052)
> - Create ad4082_channel with 20-bit resolution and 32-bit storage
> - Add ad4082_chip_info with lvds_cnv_clk_cnt_max = 8
> - Register AD4082 in device ID and OF match tables

TBH, I think this section is too much for the commit message...

> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---

...and just as good to be placed here.

Otherwise, LGTM,
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH 2/6] iio: adc: ad4080: add support for AD4082

[Andy Shevchenko]

On Fri, Feb 06, 2026 at 03:56:13PM +0200, Andy Shevchenko wrote:
> On Fri, Feb 06, 2026 at 03:08:21PM +0200, Antoniu Miclaus wrote:
> > Add support for AD4082 20-bit SAR ADC. The AD4082 has the same
> > resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
> > maximum (8 vs 7).
> 
> > Changes:
> > - Add AD4082_CHIP_ID definition (0x0052)
> > - Create ad4082_channel with 20-bit resolution and 32-bit storage
> > - Add ad4082_chip_info with lvds_cnv_clk_cnt_max = 8
> > - Register AD4082 in device ID and OF match tables
> 
> TBH, I think this section is too much for the commit message...
> 
> > Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> > ---
> 
> ...and just as good to be placed here.
> 
> Otherwise, LGTM,
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>

Same comments for the patches 4 & 6. With that being addressed,
feel free to add my Rb there as well.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH 3/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4085

[Krzysztof Kozlowski]

On Fri, Feb 06, 2026 at 03:08:22PM +0200, Antoniu Miclaus wrote:
> Add device tree binding support for the AD4085 16-bit SAR ADC.
> Add adi,ad4085 to the compatible enum.
> 
> A fallback compatible string to adi,ad4080 is not appropriate as the
> AD4085 has a different LVDS CNV clock count maximum (8 vs 7), requiring
> different driver configuration.
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
>  Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +

Squash the patches. You just added one line, but commit msg is 5 lines.
Exactly copied from previous commit.

Best regards,
Krzysztof

Re: [PATCH 5/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4088

[Krzysztof Kozlowski]

On Fri, Feb 06, 2026 at 03:08:24PM +0200, Antoniu Miclaus wrote:
> Add device tree binding support for the AD4088 14-bit SAR ADC.
> Add adi,ad4088 to the compatible enum.
> 
> A fallback compatible string to adi,ad4080 is not appropriate as the
> AD4088 has a different LVDS CNV clock count maximum (8 vs 7), requiring
> different driver configuration.

And here one more exact copy-paste. So third commit, same text, same one
liner.

Best regards,
Krzysztof

Re: [PATCH 3/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4085

[Jonathan Cameron]

On Sat, 7 Feb 2026 11:52:57 +0100
Krzysztof Kozlowski <krzk@kernel.org> wrote:

> On Fri, Feb 06, 2026 at 03:08:22PM +0200, Antoniu Miclaus wrote:
> > Add device tree binding support for the AD4085 16-bit SAR ADC.
> > Add adi,ad4085 to the compatible enum.
> > 
> > A fallback compatible string to adi,ad4080 is not appropriate as the
> > AD4085 has a different LVDS CNV clock count maximum (8 vs 7), requiring
> > different driver configuration.
> > 
> > Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> > ---
> >  Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +  
> 
> Squash the patches. You just added one line, but commit msg is 5 lines.
> Exactly copied from previous commit.

Squashing the driver changes as well into a single patch with all 3
new devices added seems sensible alongside squashing the DT.

The changes are all very similar across the 3 patches.

Jonathan

> 
> Best regards,
> Krzysztof
> 
> 

Re: [PATCH 4/6] iio: adc: ad4080: add support for AD4085

[Nuno Sá]

On Fri, 2026-02-06 at 15:08 +0200, Antoniu Miclaus wrote:
> Add support for AD4085 16-bit SAR ADC. The AD4085 has the same
> resolution as AD4084 (16-bit) but differs in LVDS CNV clock count
> maximum (8 vs 2).
> 
> Changes:
> - Add AD4085_CHIP_ID definition (0x0055)
> - Create ad4085_channel with 16-bit resolution and 16-bit storage
> - Add ad4085_chip_info with lvds_cnv_clk_cnt_max = 8
> - Register AD4085 in device ID and OF match tables
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
I do agree with Andy that the commit is too verbose. With that handled:

Reviewed-by: Nuno Sá <nuno.sa@analog.com>

>  drivers/iio/adc/ad4080.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
> index 7cbbe284dea7..728df626f09e 100644
> --- a/drivers/iio/adc/ad4080.c
> +++ b/drivers/iio/adc/ad4080.c
> @@ -130,6 +130,7 @@
>  #define AD4082_CHIP_ID						0x0052
>  #define AD4083_CHIP_ID						0x0053
>  #define AD4084_CHIP_ID						0x0054
> +#define AD4085_CHIP_ID						0x0055
>  #define AD4086_CHIP_ID						0x0056
>  #define AD4087_CHIP_ID						0x0057
>  
> @@ -449,6 +450,8 @@ static const struct iio_chan_spec ad4083_channel =
> AD4080_CHANNEL_DEFINE(16, 16)
>  
>  static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
>  
> +static const struct iio_chan_spec ad4085_channel = AD4080_CHANNEL_DEFINE(16, 16);
> +
>  static const struct iio_chan_spec ad4086_channel = AD4080_CHANNEL_DEFINE(14, 16);
>  
>  static const struct iio_chan_spec ad4087_channel = AD4080_CHANNEL_DEFINE(14, 16);
> @@ -503,6 +506,16 @@ static const struct ad4080_chip_info ad4084_chip_info = {
>  	.lvds_cnv_clk_cnt_max = 2,
>  };
>  
> +static const struct ad4080_chip_info ad4085_chip_info = {
> +	.name = "ad4085",
> +	.product_id = AD4085_CHIP_ID,
> +	.scale_table = ad4080_scale_table,
> +	.num_scales = ARRAY_SIZE(ad4080_scale_table),
> +	.num_channels = 1,
> +	.channels = &ad4085_channel,
> +	.lvds_cnv_clk_cnt_max = 8,
> +};
> +
>  static const struct ad4080_chip_info ad4086_chip_info = {
>  	.name = "ad4086",
>  	.product_id = AD4086_CHIP_ID,
> @@ -682,6 +695,7 @@ static const struct spi_device_id ad4080_id[] = {
>  	{ "ad4082", (kernel_ulong_t)&ad4082_chip_info },
>  	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
>  	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
> +	{ "ad4085", (kernel_ulong_t)&ad4085_chip_info },
>  	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
>  	{ "ad4087", (kernel_ulong_t)&ad4087_chip_info },
>  	{ }
> @@ -694,6 +708,7 @@ static const struct of_device_id ad4080_of_match[] = {
>  	{ .compatible = "adi,ad4082", &ad4082_chip_info },
>  	{ .compatible = "adi,ad4083", &ad4083_chip_info },
>  	{ .compatible = "adi,ad4084", &ad4084_chip_info },
> +	{ .compatible = "adi,ad4085", &ad4085_chip_info },
>  	{ .compatible = "adi,ad4086", &ad4086_chip_info },
>  	{ .compatible = "adi,ad4087", &ad4087_chip_info },
>  	{ }

Re: [PATCH 6/6] iio: adc: ad4080: add support for AD4088

[Nuno Sá]

On Fri, 2026-02-06 at 15:08 +0200, Antoniu Miclaus wrote:
> Add support for AD4088 14-bit SAR ADC. The AD4088 has the same
> resolution as AD4087 (14-bit) but differs in LVDS CNV clock count
> maximum (8 vs 1).
> 
> Changes:
> - Add AD4088_CHIP_ID definition (0x0058)
> - Create ad4088_channel with 14-bit resolution and 16-bit storage
> - Add ad4088_chip_info with lvds_cnv_clk_cnt_max = 8
> - Register AD4088 in device ID and OF match tables
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---

Same,

Reviewed-by: Nuno Sá <nuno.sa@analog.com>

>  drivers/iio/adc/ad4080.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
> index 728df626f09e..fc261d3d7687 100644
> --- a/drivers/iio/adc/ad4080.c
> +++ b/drivers/iio/adc/ad4080.c
> @@ -133,6 +133,7 @@
>  #define AD4085_CHIP_ID						0x0055
>  #define AD4086_CHIP_ID						0x0056
>  #define AD4087_CHIP_ID						0x0057
> +#define AD4088_CHIP_ID						0x0058
>  
>  #define AD4080_LVDS_CNV_CLK_CNT_MAX				7
>  
> @@ -456,6 +457,8 @@ static const struct iio_chan_spec ad4086_channel =
> AD4080_CHANNEL_DEFINE(14, 16)
>  
>  static const struct iio_chan_spec ad4087_channel = AD4080_CHANNEL_DEFINE(14, 16);
>  
> +static const struct iio_chan_spec ad4088_channel = AD4080_CHANNEL_DEFINE(14, 16);
> +
>  static const struct ad4080_chip_info ad4080_chip_info = {
>  	.name = "ad4080",
>  	.product_id = AD4080_CHIP_ID,
> @@ -536,6 +539,16 @@ static const struct ad4080_chip_info ad4087_chip_info = {
>  	.lvds_cnv_clk_cnt_max = 1,
>  };
>  
> +static const struct ad4080_chip_info ad4088_chip_info = {
> +	.name = "ad4088",
> +	.product_id = AD4088_CHIP_ID,
> +	.scale_table = ad4080_scale_table,
> +	.num_scales = ARRAY_SIZE(ad4080_scale_table),
> +	.num_channels = 1,
> +	.channels = &ad4088_channel,
> +	.lvds_cnv_clk_cnt_max = 8,
> +};
> +
>  static int ad4080_setup(struct iio_dev *indio_dev)
>  {
>  	struct ad4080_state *st = iio_priv(indio_dev);
> @@ -698,6 +711,7 @@ static const struct spi_device_id ad4080_id[] = {
>  	{ "ad4085", (kernel_ulong_t)&ad4085_chip_info },
>  	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
>  	{ "ad4087", (kernel_ulong_t)&ad4087_chip_info },
> +	{ "ad4088", (kernel_ulong_t)&ad4088_chip_info },
>  	{ }
>  };
>  MODULE_DEVICE_TABLE(spi, ad4080_id);
> @@ -711,6 +725,7 @@ static const struct of_device_id ad4080_of_match[] = {
>  	{ .compatible = "adi,ad4085", &ad4085_chip_info },
>  	{ .compatible = "adi,ad4086", &ad4086_chip_info },
>  	{ .compatible = "adi,ad4087", &ad4087_chip_info },
> +	{ .compatible = "adi,ad4088", &ad4088_chip_info },
>  	{ }
>  };
>  MODULE_DEVICE_TABLE(of, ad4080_of_match);

Re: [PATCH 2/6] iio: adc: ad4080: add support for AD4082

[Nuno Sá]

On Fri, 2026-02-06 at 15:08 +0200, Antoniu Miclaus wrote:
> Add support for AD4082 20-bit SAR ADC. The AD4082 has the same
> resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
> maximum (8 vs 7).
> 
> Changes:
> - Add AD4082_CHIP_ID definition (0x0052)
> - Create ad4082_channel with 20-bit resolution and 32-bit storage
> - Add ad4082_chip_info with lvds_cnv_clk_cnt_max = 8
> - Register AD4082 in device ID and OF match tables
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---

And same,

Reviewed-by: Nuno Sá <nuno.sa@analog.com>

>  drivers/iio/adc/ad4080.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
> index 7cf3b6ed7940..7cbbe284dea7 100644
> --- a/drivers/iio/adc/ad4080.c
> +++ b/drivers/iio/adc/ad4080.c
> @@ -127,6 +127,7 @@
>  #define AD4080_SPI_READ						BIT(7)
>  #define AD4080_CHIP_ID						0x0050
>  #define AD4081_CHIP_ID						0x0051
> +#define AD4082_CHIP_ID						0x0052
>  #define AD4083_CHIP_ID						0x0053
>  #define AD4084_CHIP_ID						0x0054
>  #define AD4086_CHIP_ID						0x0056
> @@ -442,6 +443,8 @@ static const struct iio_chan_spec ad4080_channel =
> AD4080_CHANNEL_DEFINE(20, 32)
>  
>  static const struct iio_chan_spec ad4081_channel = AD4080_CHANNEL_DEFINE(20, 32);
>  
> +static const struct iio_chan_spec ad4082_channel = AD4080_CHANNEL_DEFINE(20, 32);
> +
>  static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16);
>  
>  static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
> @@ -470,6 +473,16 @@ static const struct ad4080_chip_info ad4081_chip_info = {
>  	.lvds_cnv_clk_cnt_max = 2,
>  };
>  
> +static const struct ad4080_chip_info ad4082_chip_info = {
> +	.name = "ad4082",
> +	.product_id = AD4082_CHIP_ID,
> +	.scale_table = ad4080_scale_table,
> +	.num_scales = ARRAY_SIZE(ad4080_scale_table),
> +	.num_channels = 1,
> +	.channels = &ad4082_channel,
> +	.lvds_cnv_clk_cnt_max = 8,
> +};
> +
>  static const struct ad4080_chip_info ad4083_chip_info = {
>  	.name = "ad4083",
>  	.product_id = AD4083_CHIP_ID,
> @@ -666,6 +679,7 @@ static int ad4080_probe(struct spi_device *spi)
>  static const struct spi_device_id ad4080_id[] = {
>  	{ "ad4080", (kernel_ulong_t)&ad4080_chip_info },
>  	{ "ad4081", (kernel_ulong_t)&ad4081_chip_info },
> +	{ "ad4082", (kernel_ulong_t)&ad4082_chip_info },
>  	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
>  	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
>  	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
> @@ -677,6 +691,7 @@ MODULE_DEVICE_TABLE(spi, ad4080_id);
>  static const struct of_device_id ad4080_of_match[] = {
>  	{ .compatible = "adi,ad4080", &ad4080_chip_info },
>  	{ .compatible = "adi,ad4081", &ad4081_chip_info },
> +	{ .compatible = "adi,ad4082", &ad4082_chip_info },
>  	{ .compatible = "adi,ad4083", &ad4083_chip_info },
>  	{ .compatible = "adi,ad4084", &ad4084_chip_info },
>  	{ .compatible = "adi,ad4086", &ad4086_chip_info },

RE: [PATCH 3/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4085

[Miclaus, Antoniu]

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Saturday, February 7, 2026 12:53 PM
> To: Miclaus, Antoniu <Antoniu.Miclaus@analog.com>
> Cc: Lars-Peter Clausen <lars@metafoo.de>; Hennerich, Michael
> <Michael.Hennerich@analog.com>; Jonathan Cameron <jic23@kernel.org>;
> David Lechner <dlechner@baylibre.com>; Sa, Nuno <Nuno.Sa@analog.com>;
> Andy Shevchenko <andy@kernel.org>; Rob Herring <robh@kernel.org>;
> Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
> <conor+dt@kernel.org>; linux-iio@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 3/6] dt-bindings: iio: adc: adi,ad4080: add support for
> AD4085
> 
> [External]
> 
> On Fri, Feb 06, 2026 at 03:08:22PM +0200, Antoniu Miclaus wrote:
> > Add device tree binding support for the AD4085 16-bit SAR ADC.
> > Add adi,ad4085 to the compatible enum.
> >
> > A fallback compatible string to adi,ad4080 is not appropriate as the
> > AD4085 has a different LVDS CNV clock count maximum (8 vs 7), requiring
> > different driver configuration.
> >
> > Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> > ---
> >  Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
> 
> Squash the patches. You just added one line, but commit msg is 5 lines.
> Exactly copied from previous commit.

Sorry for missing your comments for v2.
I wanted to keep the structure of the patch series similar to what was already accepted and integrated into the main branch:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=83185903b4eca86e0c7145d62e55de768eeb9e7b
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6c3e7265734bbde7347d44fa8e5720bcc5ad5cea
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d34ad6467200380c8f8337ceefee9f3d8cee5492
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f11de95215311816595a1f2ee81cf8239d9b660a
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4028cbcf3415f6e0810326d87c6e0b494814ae12
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=45e81d6ac0e1af349e5da050dc0be48a72fad9dd

Do you mind if I keep the same structure for consistency? (each part in in its own patch, not half of them squashed)
I will rephrase the commits based on your feedback and Conor's such that we don't have identical commit bodies.

Thanks,
> Best regards,
> Krzysztof

Re: [PATCH 3/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4085

[Krzysztof Kozlowski]

On 16/02/2026 10:23, Miclaus, Antoniu wrote:
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzk@kernel.org>
>> Sent: Saturday, February 7, 2026 12:53 PM
>> To: Miclaus, Antoniu <Antoniu.Miclaus@analog.com>
>> Cc: Lars-Peter Clausen <lars@metafoo.de>; Hennerich, Michael
>> <Michael.Hennerich@analog.com>; Jonathan Cameron <jic23@kernel.org>;
>> David Lechner <dlechner@baylibre.com>; Sa, Nuno <Nuno.Sa@analog.com>;
>> Andy Shevchenko <andy@kernel.org>; Rob Herring <robh@kernel.org>;
>> Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley
>> <conor+dt@kernel.org>; linux-iio@vger.kernel.org;
>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH 3/6] dt-bindings: iio: adc: adi,ad4080: add support for
>> AD4085
>>
>> [External]
>>
>> On Fri, Feb 06, 2026 at 03:08:22PM +0200, Antoniu Miclaus wrote:
>>> Add device tree binding support for the AD4085 16-bit SAR ADC.
>>> Add adi,ad4085 to the compatible enum.
>>>
>>> A fallback compatible string to adi,ad4080 is not appropriate as the
>>> AD4085 has a different LVDS CNV clock count maximum (8 vs 7), requiring
>>> different driver configuration.
>>>
>>> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
>>> ---
>>>  Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
>>
>> Squash the patches. You just added one line, but commit msg is 5 lines.
>> Exactly copied from previous commit.
> 
> Sorry for missing your comments for v2.
> I wanted to keep the structure of the patch series similar to what was already accepted and integrated into the main branch:

And I want flying inflatable yellow duck. We do not use arguments that
we want, but we use arguments WHY we want something or why community
should want something.

> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=83185903b4eca86e0c7145d62e55de768eeb9e7b
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6c3e7265734bbde7347d44fa8e5720bcc5ad5cea
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d34ad6467200380c8f8337ceefee9f3d8cee5492
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f11de95215311816595a1f2ee81cf8239d9b660a
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4028cbcf3415f6e0810326d87c6e0b494814ae12
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=45e81d6ac0e1af349e5da050dc0be48a72fad9dd

>

No, because it does not make the code easier to handle.

Best regards,
Krzysztof