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Tue, 01 Jul 2025 00:40:20 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF6PfU55PeZ0THoeIsQvpLSXshyFj5bq+0QDrT7N2DDDg3D3DoMl91iR6zJ6C30Jos6dGx8tA== X-Received: by 2002:a17:903:1a70:b0:235:caa8:1a72 with SMTP id d9443c01a7336-23ac46270f7mr205402505ad.30.1751355619911; Tue, 01 Jul 2025 00:40:19 -0700 (PDT) Received: from [10.92.200.128] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23acb3c2352sm97622025ad.208.2025.07.01.00.40.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 01 Jul 2025 00:40:19 -0700 (PDT) Message-ID: Date: Tue, 1 Jul 2025 13:10:09 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 0/9] PCI: Enable Power and configure the TC9563 PCIe switch To: Dmitry Baryshkov Cc: Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , chaitanya chundru , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Jingoo Han , Bartosz Golaszewski , quic_vbadigan@quicnic.com, amitk@kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, jorge.ramirez@oss.qualcomm.com, Dmitry Baryshkov , Bartosz Golaszewski References: <20250412-qps615_v4_1-v5-0-5b6a06132fec@oss.qualcomm.com> Content-Language: en-US From: Krishna Chaitanya Chundru In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: wjPfgzoZB8LWQVBwKgoOROUm_9zVIHUN X-Authority-Analysis: v=2.4 cv=YPWfyQGx c=1 sm=1 tr=0 ts=686390f3 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=MuaoRvlZ_d6aMCo3pHsA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-ORIG-GUID: wjPfgzoZB8LWQVBwKgoOROUm_9zVIHUN X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzAxMDA0MyBTYWx0ZWRfX/oA5wlk9vUMy EogQPo2QrFDQush5aCAmvunyLidNv1NOvCWBFpWrR4/23IeFiG2BgCIeqFbqsycEzbC6Wme032E 2tUIfGvD8/EIcuopxhFRg6YQmpWlAvWDoDc8UnVSOkNPk9f+wJvQDijyuWy6LLwCZ5srjVXtr/W qYKKQU2aEmFJB0+eLn/dW6yb4o5n8JxCAw9xH4vNNbwSroslNJlrumesdtqr5TuJIPB8MffGVIu 9B594edPqTHjVzRmynzGktU7XqJitNtEXkF9lojzV4qr8VoS7VALp3bxMGCOX9xQ48amE7hMXaT wheqV5FDXf992gY6du0Y6GgmeYYZDsRrIqI4OzvqiYm9jpE7ic583hDr9CvtUoMilq5cAkd3d6S Lh9DRhKTINJAetZyzTH9n1IDthC6mOLMn0XdreQJRLfPFSGhVIhYrsPN18JNUNevHE+Xuh5W X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-01_01,2025-06-27_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxlogscore=908 mlxscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 adultscore=0 priorityscore=1501 bulkscore=0 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507010043 On 7/1/2025 12:41 PM, Dmitry Baryshkov wrote: > On Sat, Apr 12, 2025 at 07:19:49AM +0530, Krishna Chaitanya Chundru wrote: >> TC9563 is the PCIe switch which has one upstream and three downstream >> ports. To one of the downstream ports ethernet MAC is connected as endpoint >> device. Other two downstream ports are supposed to connect to external >> device. One Host can connect to TC956x by upstream port. >> >> TC9563 switch power is controlled by the GPIO's. After powering on >> the switch will immediately participate in the link training. if the >> host is also ready by that time PCIe link will established. >> >> The TC9563 needs to configured certain parameters like de-emphasis, >> disable unused port etc before link is established. >> >> As the controller starts link training before the probe of pwrctl driver, >> the PCIe link may come up as soon as we power on the switch. Due to this >> configuring the switch itself through i2c will not have any effect as >> this configuration needs to done before link training. To avoid this >> introduce two functions in pci_ops to start_link() & stop_link() which >> will disable the link training if the PCIe link is not up yet. >> >> This series depends on the https://lore.kernel.org/all/20250124101038.3871768-3-krishna.chundru@oss.qualcomm.com/ >> >> Note: The QPS615 PCIe switch is rebranded version of Toshiba switch TC9563 series. >> There is no difference between both the switches, both has two open downstream ports >> and one embedded downstream port to which Ethernet MAC is connected. As QPS615 is the >> rebranded version of Toshiba switch rename qps615 with tc956x so that this driver >> can be leveraged by all who are using Toshiba switch. >> >> Signed-off-by: Krishna Chaitanya Chundru > > Krishna, the series no longer applies to linux-next. There were comments > which required another respin. When can we expect a next revision? Hi Dmitry, Mani asked me hold on this series as he was working on some design changes on pwrctrl framework which can impact our design too. Once Mani posts his new design I will respin this series. - Krishna Chaitanya. >