Re: [RFC PATCH 2/8] dt-bindings: display: add versilicon,dc

[Icenowy Zheng <uwu@icenowy.me>]

在 2025-08-15星期五的 17:53 +0800，Icenowy Zheng写道：
> 在 2025-08-15星期五的 11:09 +0200，Krzysztof Kozlowski写道：
> > On 15/08/2025 00:04, Rob Herring wrote:
> > > > +
> > > > +maintainers:
> > > > +  - Icenowy Zheng <uwu@icenowy.me>
> > > > +
> > > > +properties:
> > > > +  $nodename:
> > > > +    pattern: "^display@[0-9a-f]+$"
> > > > +
> > > > +  compatible:
> > > > +    const: verisilicon,dc
> > > 
> > > If the clocks or resets varies by platform, then you need an SoC 
> > > specific compatible still. If these clocks/resets are straight
> > > from
> > > the 
> > > RTL and any other number of clocks/resets is wrong, then we can
> > > stick 
> > > with just this compatible.
> > 
> > Shouldn't we have here always SoC compatible? Can it be ever used
> > alone,
> > outside of given SoC?
> > 
> > I could imagine now:
> > 
> > items:
> >   - {}
> >   - const: verisilicon,dc
> 
> I followed the `vivante,gc` situation here, because the registers
> before 0x1400 (where real display-related things start) seems to
> follow
> the same scheme with GC-series GPUs, including the identification
> registers.

An example here: the customer id (0x0030) register value read out on T-
Head TH1520 is 0x30a, but on StarFive JH6110 it's 0x30e instead.

(Both are DC8200 rev 5720, so the 0x0020 reg is 0x8200 and 0x0024 reg
is 0x5720.)

> 
> > 
> > 
> > Best regards,
> > Krzysztof
>