[PATCH V2 0/3] arm64: dts: qcom: x1e80100: Enable bwmon support

[PATCH V2 0/3] arm64: dts: qcom: x1e80100: Enable bwmon support

[Sibi Sankar]

This patch series enables bwmon support on X1E80100 SoCs.

V2:
* Allow for opp-tables to be optional on X1E cpu-bwmon instances. [Konrad]
* Drop Rb from Krzysztof due to more bindings changes.
* Use explicit request/free irq and add comments regarding the race
  introduced when adding the IRQF_SHARED flag. [Krzysztof/Dmitry]
* Use consistent numbering of the opps across instances. [Shiv]
* Use ICC_TAG_ACTIVE_ONLY instead of magic numbers. [Konrad]
* Drop fastrpc enablement patch. [Bjorn]

tag: next-20240617
base-commit: 76db4c64526c5e8ba0f56ad3d890dce8f9b00bbc

Sibi Sankar (3):
  dt-bindings: interconnect: qcom,msm8998-bwmon: Add X1E80100 BWMON
    instances
  soc: qcom: icc-bwmon: Allow for interrupts to be shared across
    instances
  arm64: dts: qcom: x1e80100: Add BWMONs

 .../interconnect/qcom,msm8998-bwmon.yaml      |  14 +-
 arch/arm64/boot/dts/qcom/x1e80100.dtsi        | 120 ++++++++++++++++++
 drivers/soc/qcom/icc-bwmon.c                  |  14 +-
 3 files changed, 144 insertions(+), 4 deletions(-)

-- 
2.34.1

[PATCH V2 1/3] dt-bindings: interconnect: qcom,msm8998-bwmon: Add X1E80100 BWMON instances

[Sibi Sankar]

Document X1E80100 BWMONs, which has multiple (one per cluster) BWMONv4
instances for the CPU->LLCC path and one BWMONv5 instance for LLCC->DDR
path. Also make the opp-table optional for the X1E cpu-bwmon instances,
since they use the same opp-table between them.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---

v2:
* Allow for opp-tables to be optional on X1E cpu-bwmon instances. [Konrad]
* Drop Rb from Krzysztof due to more bindings changes.

 .../bindings/interconnect/qcom,msm8998-bwmon.yaml  | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
index 05067e197abe..090dbf8dca8b 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
@@ -35,6 +35,7 @@ properties:
               - qcom,sm8250-cpu-bwmon
               - qcom,sm8550-cpu-bwmon
               - qcom,sm8650-cpu-bwmon
+              - qcom,x1e80100-cpu-bwmon
           - const: qcom,sdm845-bwmon    # BWMON v4, unified register space
       - items:
           - enum:
@@ -44,6 +45,7 @@ properties:
               - qcom,sm8250-llcc-bwmon
               - qcom,sm8550-llcc-bwmon
               - qcom,sm8650-llcc-bwmon
+              - qcom,x1e80100-llcc-bwmon
           - const: qcom,sc7280-llcc-bwmon
       - const: qcom,sc7280-llcc-bwmon   # BWMON v5
       - const: qcom,sdm845-llcc-bwmon   # BWMON v5
@@ -72,7 +74,6 @@ required:
   - interconnects
   - interrupts
   - operating-points-v2
-  - opp-table
   - reg
 
 additionalProperties: false
@@ -100,6 +101,17 @@ allOf:
         reg-names:
           maxItems: 1
 
+  - if:
+      not:
+        properties:
+          compatible:
+            contains:
+              enum:
+                - qcom,x1e80100-cpu-bwmon
+    then:
+      required:
+        - opp-table
+
 examples:
   - |
     #include <dt-bindings/interconnect/qcom,sdm845.h>
-- 
2.34.1

Re: [PATCH V2 1/3] dt-bindings: interconnect: qcom,msm8998-bwmon: Add X1E80100 BWMON instances

[Konrad Dybcio]

On 6/18/24 17:43, Sibi Sankar wrote:
> Document X1E80100 BWMONs, which has multiple (one per cluster) BWMONv4
> instances for the CPU->LLCC path and one BWMONv5 instance for LLCC->DDR
> path. Also make the opp-table optional for the X1E cpu-bwmon instances,
> since they use the same opp-table between them.
> 
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---

I think we can just drop the opp-table child node from required altogether,
bindings shouldn't care about where the OPP table (which is referenced in
the operating-points-v2 property) comes from

Konrad

Re: [PATCH V2 1/3] dt-bindings: interconnect: qcom,msm8998-bwmon: Add X1E80100 BWMON instances

[Krzysztof Kozlowski]

On 18/06/2024 18:02, Konrad Dybcio wrote:
> 
> 
> On 6/18/24 17:43, Sibi Sankar wrote:
>> Document X1E80100 BWMONs, which has multiple (one per cluster) BWMONv4
>> instances for the CPU->LLCC path and one BWMONv5 instance for LLCC->DDR
>> path. Also make the opp-table optional for the X1E cpu-bwmon instances,
>> since they use the same opp-table between them.
>>
>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
>> ---
> 
> I think we can just drop the opp-table child node from required altogether,
> bindings shouldn't care about where the OPP table (which is referenced in
> the operating-points-v2 property) comes from

I agree.

Best regards,
Krzysztof

Re: [PATCH V2 1/3] dt-bindings: interconnect: qcom,msm8998-bwmon: Add X1E80100 BWMON instances

[Sibi Sankar]

On 6/21/24 12:14, Krzysztof Kozlowski wrote:
> On 18/06/2024 18:02, Konrad Dybcio wrote:
>>
>>
>> On 6/18/24 17:43, Sibi Sankar wrote:
>>> Document X1E80100 BWMONs, which has multiple (one per cluster) BWMONv4
>>> instances for the CPU->LLCC path and one BWMONv5 instance for LLCC->DDR
>>> path. Also make the opp-table optional for the X1E cpu-bwmon instances,
>>> since they use the same opp-table between them.
>>>
>>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
>>> ---
>>
>> I think we can just drop the opp-table child node from required altogether,
>> bindings shouldn't care about where the OPP table (which is referenced in
>> the operating-points-v2 property) comes from
> 
> I agree.

Thanks, will break ^^ into a separate patch for the
next re-spin.

-Sibi
> 
> Best regards,
> Krzysztof
> 

[PATCH V2 2/3] soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances

[Sibi Sankar]

The multiple BWMONv4 instances available on the X1E80100 SoC use the
same interrupt number. Mark them are shared to allow for re-use across
instances. Handle the ensuing race introduced by relying on bwmon_disable
to disable the interrupt and coupled with explicit request/free irqs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---

v2:
* Use explicit request/free irq and add comments regarding the race
  introduced when adding the IRQF_SHARED flag. [Krzysztof/Dmitry]

 drivers/soc/qcom/icc-bwmon.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c
index fb323b3364db..4a4e28b41509 100644
--- a/drivers/soc/qcom/icc-bwmon.c
+++ b/drivers/soc/qcom/icc-bwmon.c
@@ -781,9 +781,10 @@ static int bwmon_probe(struct platform_device *pdev)
 	bwmon->dev = dev;
 
 	bwmon_disable(bwmon);
-	ret = devm_request_threaded_irq(dev, bwmon->irq, bwmon_intr,
-					bwmon_intr_thread,
-					IRQF_ONESHOT, dev_name(dev), bwmon);
+
+	/* SoCs with multiple cpu-bwmon instances can end up using a shared interrupt line */
+	ret = request_threaded_irq(bwmon->irq, bwmon_intr, bwmon_intr_thread,
+				   IRQF_ONESHOT | IRQF_SHARED, dev_name(dev), bwmon);
 	if (ret)
 		return dev_err_probe(dev, ret, "failed to request IRQ\n");
 
@@ -798,6 +799,13 @@ static void bwmon_remove(struct platform_device *pdev)
 	struct icc_bwmon *bwmon = platform_get_drvdata(pdev);
 
 	bwmon_disable(bwmon);
+
+	/*
+	 * Handle the race introduced, when dealing with multiple bwmon instances
+	 * using a shared interrupt line, by relying on bwmon_disable to disable
+	 * the interrupt and followed by an explicit free.
+	 */
+	free_irq(bwmon->irq, bwmon);
 }
 
 static const struct icc_bwmon_data msm8998_bwmon_data = {
-- 
2.34.1

Re: [PATCH V2 2/3] soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances

[Dmitry Baryshkov]

On Tue, Jun 18, 2024 at 09:13:05PM GMT, Sibi Sankar wrote:
> The multiple BWMONv4 instances available on the X1E80100 SoC use the
> same interrupt number. Mark them are shared to allow for re-use across
> instances. Handle the ensuing race introduced by relying on bwmon_disable
> to disable the interrupt and coupled with explicit request/free irqs.
> 
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
> 
> v2:
> * Use explicit request/free irq and add comments regarding the race
>   introduced when adding the IRQF_SHARED flag. [Krzysztof/Dmitry]
> 
>  drivers/soc/qcom/icc-bwmon.c | 14 +++++++++++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c
> index fb323b3364db..4a4e28b41509 100644
> --- a/drivers/soc/qcom/icc-bwmon.c
> +++ b/drivers/soc/qcom/icc-bwmon.c
> @@ -781,9 +781,10 @@ static int bwmon_probe(struct platform_device *pdev)
>  	bwmon->dev = dev;
>  
>  	bwmon_disable(bwmon);
> -	ret = devm_request_threaded_irq(dev, bwmon->irq, bwmon_intr,
> -					bwmon_intr_thread,
> -					IRQF_ONESHOT, dev_name(dev), bwmon);
> +
> +	/* SoCs with multiple cpu-bwmon instances can end up using a shared interrupt line */

... using devm_ here might result in the IRQ handler being executed
after bwmon_disable in bwmon_remove()

> +	ret = request_threaded_irq(bwmon->irq, bwmon_intr, bwmon_intr_thread,
> +				   IRQF_ONESHOT | IRQF_SHARED, dev_name(dev), bwmon);
>  	if (ret)
>  		return dev_err_probe(dev, ret, "failed to request IRQ\n");
>  
> @@ -798,6 +799,13 @@ static void bwmon_remove(struct platform_device *pdev)
>  	struct icc_bwmon *bwmon = platform_get_drvdata(pdev);
>  
>  	bwmon_disable(bwmon);
> +
> +	/*
> +	 * Handle the race introduced, when dealing with multiple bwmon instances
> +	 * using a shared interrupt line, by relying on bwmon_disable to disable
> +	 * the interrupt and followed by an explicit free.
> +	 */

This sounds more like a part of the commit message. The comment before
request_threaded_irq() should be enough.

> +	free_irq(bwmon->irq, bwmon);
>  }
>  
>  static const struct icc_bwmon_data msm8998_bwmon_data = {
> -- 
> 2.34.1
> 

-- 
With best wishes
Dmitry

Re: [PATCH V2 2/3] soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances

[Sibi Sankar]

On 6/19/24 00:25, Dmitry Baryshkov wrote:
> On Tue, Jun 18, 2024 at 09:13:05PM GMT, Sibi Sankar wrote:
>> The multiple BWMONv4 instances available on the X1E80100 SoC use the
>> same interrupt number. Mark them are shared to allow for re-use across
>> instances. Handle the ensuing race introduced by relying on bwmon_disable
>> to disable the interrupt and coupled with explicit request/free irqs.
>>
>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
>> ---
>>
>> v2:
>> * Use explicit request/free irq and add comments regarding the race
>>    introduced when adding the IRQF_SHARED flag. [Krzysztof/Dmitry]
>>
>>   drivers/soc/qcom/icc-bwmon.c | 14 +++++++++++---
>>   1 file changed, 11 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c
>> index fb323b3364db..4a4e28b41509 100644
>> --- a/drivers/soc/qcom/icc-bwmon.c
>> +++ b/drivers/soc/qcom/icc-bwmon.c
>> @@ -781,9 +781,10 @@ static int bwmon_probe(struct platform_device *pdev)
>>   	bwmon->dev = dev;
>>   
>>   	bwmon_disable(bwmon);
>> -	ret = devm_request_threaded_irq(dev, bwmon->irq, bwmon_intr,
>> -					bwmon_intr_thread,
>> -					IRQF_ONESHOT, dev_name(dev), bwmon);
>> +
>> +	/* SoCs with multiple cpu-bwmon instances can end up using a shared interrupt line */
> 
> ... using devm_ here might result in the IRQ handler being executed
> after bwmon_disable in bwmon_remove()

Ack

> 
>> +	ret = request_threaded_irq(bwmon->irq, bwmon_intr, bwmon_intr_thread,
>> +				   IRQF_ONESHOT | IRQF_SHARED, dev_name(dev), bwmon);
>>   	if (ret)
>>   		return dev_err_probe(dev, ret, "failed to request IRQ\n");
>>   
>> @@ -798,6 +799,13 @@ static void bwmon_remove(struct platform_device *pdev)
>>   	struct icc_bwmon *bwmon = platform_get_drvdata(pdev);
>>   
>>   	bwmon_disable(bwmon);
>> +
>> +	/*
>> +	 * Handle the race introduced, when dealing with multiple bwmon instances
>> +	 * using a shared interrupt line, by relying on bwmon_disable to disable
>> +	 * the interrupt and followed by an explicit free.
>> +	 */
> 
> This sounds more like a part of the commit message. The comment before
> request_threaded_irq() should be enough.

Ack

-Sibi

> 
>> +	free_irq(bwmon->irq, bwmon);
>>   }
>>   
>>   static const struct icc_bwmon_data msm8998_bwmon_data = {
>> -- 
>> 2.34.1
>>
> 

Re: [PATCH V2 2/3] soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances

[Bjorn Andersson]

On Tue, Jun 18, 2024 at 09:13:05PM GMT, Sibi Sankar wrote:
> The multiple BWMONv4 instances available on the X1E80100 SoC use the
> same interrupt number. Mark them are shared to allow for re-use across
> instances. Handle the ensuing race introduced by relying on bwmon_disable

In an effort to educate the reader, could you please describe what the
race condition is here.

It would also make sense to break this ("Handle...") into a separate
paragraph.

Regards,
Bjorn

> to disable the interrupt and coupled with explicit request/free irqs.
> 
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
> 
> v2:
> * Use explicit request/free irq and add comments regarding the race
>   introduced when adding the IRQF_SHARED flag. [Krzysztof/Dmitry]
> 
>  drivers/soc/qcom/icc-bwmon.c | 14 +++++++++++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c
> index fb323b3364db..4a4e28b41509 100644
> --- a/drivers/soc/qcom/icc-bwmon.c
> +++ b/drivers/soc/qcom/icc-bwmon.c
> @@ -781,9 +781,10 @@ static int bwmon_probe(struct platform_device *pdev)
>  	bwmon->dev = dev;
>  
>  	bwmon_disable(bwmon);
> -	ret = devm_request_threaded_irq(dev, bwmon->irq, bwmon_intr,
> -					bwmon_intr_thread,
> -					IRQF_ONESHOT, dev_name(dev), bwmon);
> +
> +	/* SoCs with multiple cpu-bwmon instances can end up using a shared interrupt line */
> +	ret = request_threaded_irq(bwmon->irq, bwmon_intr, bwmon_intr_thread,
> +				   IRQF_ONESHOT | IRQF_SHARED, dev_name(dev), bwmon);
>  	if (ret)
>  		return dev_err_probe(dev, ret, "failed to request IRQ\n");
>  
> @@ -798,6 +799,13 @@ static void bwmon_remove(struct platform_device *pdev)
>  	struct icc_bwmon *bwmon = platform_get_drvdata(pdev);
>  
>  	bwmon_disable(bwmon);
> +
> +	/*
> +	 * Handle the race introduced, when dealing with multiple bwmon instances
> +	 * using a shared interrupt line, by relying on bwmon_disable to disable
> +	 * the interrupt and followed by an explicit free.
> +	 */
> +	free_irq(bwmon->irq, bwmon);
>  }
>  
>  static const struct icc_bwmon_data msm8998_bwmon_data = {
> -- 
> 2.34.1
> 

Re: [PATCH V2 2/3] soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances

[Sibi Sankar]

On 6/21/24 11:15, Bjorn Andersson wrote:
> On Tue, Jun 18, 2024 at 09:13:05PM GMT, Sibi Sankar wrote:
>> The multiple BWMONv4 instances available on the X1E80100 SoC use the
>> same interrupt number. Mark them are shared to allow for re-use across
>> instances. Handle the ensuing race introduced by relying on bwmon_disable
> 
> In an effort to educate the reader, could you please describe what the
> race condition is here.
> 
> It would also make sense to break this ("Handle...") into a separate
> paragraph.

Ack, will make the changes in the next re-spin.

-Sibi

> 
> Regards,
> Bjorn
> 
>> to disable the interrupt and coupled with explicit request/free irqs.
>>
>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
>> ---
>>
>> v2:
>> * Use explicit request/free irq and add comments regarding the race
>>    introduced when adding the IRQF_SHARED flag. [Krzysztof/Dmitry]
>>
>>   drivers/soc/qcom/icc-bwmon.c | 14 +++++++++++---
>>   1 file changed, 11 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c
>> index fb323b3364db..4a4e28b41509 100644
>> --- a/drivers/soc/qcom/icc-bwmon.c
>> +++ b/drivers/soc/qcom/icc-bwmon.c
>> @@ -781,9 +781,10 @@ static int bwmon_probe(struct platform_device *pdev)
>>   	bwmon->dev = dev;
>>   
>>   	bwmon_disable(bwmon);
>> -	ret = devm_request_threaded_irq(dev, bwmon->irq, bwmon_intr,
>> -					bwmon_intr_thread,
>> -					IRQF_ONESHOT, dev_name(dev), bwmon);
>> +
>> +	/* SoCs with multiple cpu-bwmon instances can end up using a shared interrupt line */
>> +	ret = request_threaded_irq(bwmon->irq, bwmon_intr, bwmon_intr_thread,
>> +				   IRQF_ONESHOT | IRQF_SHARED, dev_name(dev), bwmon);
>>   	if (ret)
>>   		return dev_err_probe(dev, ret, "failed to request IRQ\n");
>>   
>> @@ -798,6 +799,13 @@ static void bwmon_remove(struct platform_device *pdev)
>>   	struct icc_bwmon *bwmon = platform_get_drvdata(pdev);
>>   
>>   	bwmon_disable(bwmon);
>> +
>> +	/*
>> +	 * Handle the race introduced, when dealing with multiple bwmon instances
>> +	 * using a shared interrupt line, by relying on bwmon_disable to disable
>> +	 * the interrupt and followed by an explicit free.
>> +	 */
>> +	free_irq(bwmon->irq, bwmon);
>>   }
>>   
>>   static const struct icc_bwmon_data msm8998_bwmon_data = {
>> -- 
>> 2.34.1
>>

[PATCH V2 3/3] arm64: dts: qcom: x1e80100: Add BWMONs

[Sibi Sankar]

Add the CPU and LLCC BWMONs on X1E80100 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---

v2:
* Allow for opp-tables to be optional on X1E cpu-bwmon instances. [Konrad]
* Use consistent numbering of the opps across instances. [Shiv]
* Use ICC_TAG_ACTIVE_ONLY instead of magic numbers. [Konrad]

 arch/arm64/boot/dts/qcom/x1e80100.dtsi | 120 +++++++++++++++++++++++++
 1 file changed, 120 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 9944c654851e..d8b972c2bc3e 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -5299,6 +5299,126 @@ frame@1780d000 {
 			};
 		};
 
+		pmu@24091000 {
+			compatible = "qcom,x1e80100-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
+			reg = <0 0x24091000 0 0x1000>;
+
+			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+
+			interconnects = <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
+					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+			operating-points-v2 = <&llcc_bwmon_opp_table>;
+
+			llcc_bwmon_opp_table: opp-table {
+				compatible = "operating-points-v2";
+
+				opp-0 {
+					opp-peak-kBps = <800000>;
+				};
+
+				opp-1 {
+					opp-peak-kBps = <2188000>;
+				};
+
+				opp-2 {
+					opp-peak-kBps = <3072000>;
+				};
+
+				opp-3 {
+					opp-peak-kBps = <6220800>;
+				};
+
+				opp-4 {
+					opp-peak-kBps = <6835200>;
+				};
+
+				opp-5 {
+					opp-peak-kBps = <8371200>;
+				};
+
+				opp-6 {
+					opp-peak-kBps = <10944000>;
+				};
+
+				opp-7 {
+					opp-peak-kBps = <12748800>;
+				};
+
+				opp-8 {
+					opp-peak-kBps = <14745600>;
+				};
+
+				opp-9 {
+					opp-peak-kBps = <16896000>;
+				};
+			};
+		};
+
+		pmu@240b3400 {
+			compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";
+			reg = <0 0x240b3400 0 0x600>;
+
+			interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+					 &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+			operating-points-v2 = <&cpu_bwmon_opp_table>;
+
+			cpu_bwmon_opp_table: opp-table {
+				compatible = "operating-points-v2";
+
+				opp-0 {
+					opp-peak-kBps = <4800000>;
+				};
+
+				opp-1 {
+					opp-peak-kBps = <7464000>;
+				};
+
+				opp-2 {
+					opp-peak-kBps = <9600000>;
+				};
+
+				opp-3 {
+					opp-peak-kBps = <12896000>;
+				};
+
+				opp-4 {
+					opp-peak-kBps = <14928000>;
+				};
+
+				opp-5 {
+					opp-peak-kBps = <17064000>;
+				};
+			};
+		};
+
+		pmu@240b5400 {
+			compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";
+			reg = <0 0x240b5400 0 0x600>;
+
+			interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+					 &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+			operating-points-v2 = <&cpu_bwmon_opp_table>;
+		};
+
+		pmu@240b6400 {
+			compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";
+			reg = <0 0x240b6400 0 0x600>;
+
+			interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+					 &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+			operating-points-v2 = <&cpu_bwmon_opp_table>;
+		};
+
 		system-cache-controller@25000000 {
 			compatible = "qcom,x1e80100-llcc";
 			reg = <0 0x25000000 0 0x200000>,
-- 
2.34.1

Re: [PATCH V2 3/3] arm64: dts: qcom: x1e80100: Add BWMONs

[Konrad Dybcio]

On 6/18/24 17:43, Sibi Sankar wrote:
> Add the CPU and LLCC BWMONs on X1E80100 SoCs.
> 
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---

If you're going to resend, please add a comment like:

/* CPU0-3 */

above the respective monitor nodes

Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad

Re: [PATCH V2 3/3] arm64: dts: qcom: x1e80100: Add BWMONs

[Sibi Sankar]

On 6/19/24 01:03, Konrad Dybcio wrote:
> 
> 
> On 6/18/24 17:43, Sibi Sankar wrote:
>> Add the CPU and LLCC BWMONs on X1E80100 SoCs.
>>
>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
>> ---
> 
> If you're going to resend, please add a comment like:
> 
> /* CPU0-3 */

Ack, but I'll mention the cluster info directly.

-Sibi

> 
> above the respective monitor nodes
> 
> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> 
> Konrad