From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Ajit Pandey <quic_ajipan@quicinc.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Vinod Koul <vkoul@kernel.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Taniya Das <quic_tdas@quicinc.com>,
Jagadeesh Kona <quic_jkona@quicinc.com>,
Imran Shaik <quic_imrashai@quicinc.com>,
Satya Priya Kakitapalli <quic_skakitap@quicinc.com>,
stable@vger.kernel.org,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Subject: Re: [PATCH V4 1/8] clk: qcom: clk-alpha-pll: Fix CAL_L_VAL override for LUCID EVO PLL
Date: Thu, 13 Jun 2024 18:58:33 +0200 [thread overview]
Message-ID: <d1062fb2-860a-41fe-887f-14977181f5f3@linaro.org> (raw)
In-Reply-To: <20240611133752.2192401-2-quic_ajipan@quicinc.com>
On 6/11/24 15:37, Ajit Pandey wrote:
> In LUCID EVO PLL CAL_L_VAL and L_VAL bitfields are part of single
> PLL_L_VAL register. Update for L_VAL bitfield values in PLL_L_VAL
> register using regmap_write() API in __alpha_pll_trion_set_rate
> callback will override LUCID EVO PLL initial configuration related
> to PLL_CAL_L_VAL bit fields in PLL_L_VAL register.
>
> Observed random PLL lock failures during PLL enable due to such
> override in PLL calibration value. Use regmap_update_bits() with
> L_VAL bitfield mask instead of regmap_write() API to update only
> PLL_L_VAL bitfields in __alpha_pll_trion_set_rate callback.
>
> Fixes: 260e36606a03 ("clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces")
> Cc: stable@vger.kernel.org
> Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/clk/qcom/clk-alpha-pll.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index c51647e37df8..a538559caaa0 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -1665,7 +1665,7 @@ static int __alpha_pll_trion_set_rate(struct clk_hw *hw, unsigned long rate,
> if (ret < 0)
> return ret;
>
> - regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
> + regmap_update_bits(pll->clkr.regmap, PLL_L_VAL(pll), LUCID_EVO_PLL_L_VAL_MASK, l);
Since you're altering a function used by LUCID and TRION PLLs.. how will
that affect non-LUCID_EVO/OLE ones?
Konrad
next prev parent reply other threads:[~2024-06-13 16:58 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-11 13:37 [PATCH V4 0/8] clk: qcom: Add support for DISPCC, CAMCC and GPUCC on SM4450 Ajit Pandey
2024-06-11 13:37 ` [PATCH V4 1/8] clk: qcom: clk-alpha-pll: Fix CAL_L_VAL override for LUCID EVO PLL Ajit Pandey
2024-06-13 8:19 ` Vladimir Zapolskiy
2024-06-13 16:58 ` Konrad Dybcio [this message]
2024-06-11 13:37 ` [PATCH V4 2/8] dt-bindings: clock: qcom: add DISPCC clocks on SM4450 Ajit Pandey
2024-06-11 13:37 ` [PATCH V4 3/8] clk: qcom: Add DISPCC driver support for SM4450 Ajit Pandey
2024-06-11 13:37 ` [PATCH V4 4/8] dt-bindings: clock: qcom: add CAMCC clocks on SM4450 Ajit Pandey
2024-06-11 13:37 ` [PATCH V4 5/8] clk: qcom: Add CAMCC driver support for SM4450 Ajit Pandey
2024-06-11 13:37 ` [PATCH V4 6/8] dt-bindings: clock: qcom: add GPUCC clocks on SM4450 Ajit Pandey
2024-06-11 13:37 ` [PATCH V4 7/8] clk: qcom: Add GPUCC driver support for SM4450 Ajit Pandey
2024-06-11 13:37 ` [PATCH V4 8/8] arm64: dts: qcom: sm4450: add camera, display and gpu clock controller Ajit Pandey
2024-06-11 15:47 ` Dmitry Baryshkov
2024-06-13 7:41 ` Konrad Dybcio
2024-07-03 9:16 ` Ajit Pandey
2024-07-11 9:55 ` Konrad Dybcio
2024-07-12 9:53 ` Ajit Pandey
2024-07-12 12:22 ` Konrad Dybcio
2024-07-12 12:31 ` Ajit Pandey
2024-07-12 12:40 ` Konrad Dybcio
2024-07-16 8:39 ` Taniya Das
2024-07-16 10:39 ` Konrad Dybcio
2024-07-26 8:18 ` Ajit Pandey
2024-08-15 20:40 ` (subset) [PATCH V4 0/8] clk: qcom: Add support for DISPCC, CAMCC and GPUCC on SM4450 Bjorn Andersson
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