From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Simon Horman <horms@verge.net.au>,
Rob Herring <robh+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Magnus Damm <magnus.damm@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: dts: renesas: v3msk: add SCIF0 pins
Date: Tue, 13 Mar 2018 22:26:01 +0300 [thread overview]
Message-ID: <d21e29c9-1364-357e-dd64-af14b0068cbd@cogentembedded.com> (raw)
Add the (previously omitted) SCIF0 pin data to the V3M Starter Kit board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
The patch is against the 'renesas-devel-20180308-v4.16-rc4' tag of Simon's
'renesas.git repo...
arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
+++ renesas/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
@@ -51,6 +51,16 @@
clock-frequency = <32768>;
};
+&pfc {
+ scif0_pins: scif0 {
+ groups = "scif0_data";
+ function = "scif0";
+ };
+};
+
&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
next reply other threads:[~2018-03-13 19:26 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-13 19:26 Sergei Shtylyov [this message]
2018-03-14 13:14 ` [PATCH] arm64: dts: renesas: v3msk: add SCIF0 pins Geert Uytterhoeven
2018-03-14 14:44 ` Simon Horman
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