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([2001:818:ea8e:7f00:2575:914:eedd:620e]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a073ca435dsm17262428f8f.21.2025.04.30.08.36.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Apr 2025 08:36:09 -0700 (PDT) Message-ID: Subject: Re: [PATCH 3/5] iio: adc: ad7606: add offset and phase calibration support From: Nuno =?ISO-8859-1?Q?S=E1?= To: Angelo Dureghello , Jonathan Cameron , David Lechner , Nuno =?ISO-8859-1?Q?S=E1?= , Andy Shevchenko , Lars-Peter Clausen , Michael Hennerich , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Date: Wed, 30 Apr 2025 16:36:13 +0100 In-Reply-To: <20250429-wip-bl-ad7606-calibration-v1-3-eb4d4821b172@baylibre.com> References: <20250429-wip-bl-ad7606-calibration-v1-0-eb4d4821b172@baylibre.com> <20250429-wip-bl-ad7606-calibration-v1-3-eb4d4821b172@baylibre.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Tue, 2025-04-29 at 15:06 +0200, Angelo Dureghello wrote: > From: Angelo Dureghello >=20 > Add support for offset and phase calibration, only for > devices that support software mode, that are: >=20 > ad7606b > ad7606c-16 > ad7606c-18 >=20 > Signed-off-by: Angelo Dureghello > --- > =C2=A0drivers/iio/adc/ad7606.c | 160 > +++++++++++++++++++++++++++++++++++++++++++++++ > =C2=A0drivers/iio/adc/ad7606.h |=C2=A0=C2=A0 9 +++ > =C2=A02 files changed, 169 insertions(+) >=20 > diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c > index > ad5e6b5e1d5d2edc7f8ac7ed9a8a4e6e43827b85..ec063dd4a67eb94610c41c473e2d804= 0c919 > 74cf 100644 > --- a/drivers/iio/adc/ad7606.c > +++ b/drivers/iio/adc/ad7606.c > @@ -95,6 +95,22 @@ static const unsigned int ad7616_oversampling_avail[8]= =3D { > =C2=A0 1, 2, 4, 8, 16, 32, 64, 128, > =C2=A0}; > =C2=A0 > +static const int ad7606_calib_offset_avail[3] =3D { > + -128, 1, 127, > +}; > + > +static const int ad7606c_18bit_calib_offset_avail[3] =3D { > + -512, 4, 511, > +}; >From the DS, it seems this is 508? > + > +static const int ad7606b_calib_phase_avail[][2] =3D { > + { 0, 0 }, { 0, 1250 }, { 0, 318750 }, > +}; > + > +static const int ad7606c_calib_phase_avail[][2] =3D { > + { 0, 0 }, { 0, 1000 }, { 0, 255000 }, > +}; > + > =C2=A0static int ad7606c_18bit_chan_scale_setup(struct iio_dev *indio_dev= , > =C2=A0 =C2=A0 struct iio_chan_spec *chan); > =C2=A0static int ad7606c_16bit_chan_scale_setup(struct iio_dev *indio_dev= , > @@ -164,6 +180,8 @@ const struct ad7606_chip_info ad7606b_info =3D { > =C2=A0 .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, > =C2=A0 .sw_setup_cb =3D ad7606b_sw_mode_setup, > =C2=A0 .offload_storagebits =3D 32, > + .calib_offset_avail =3D ad7606_calib_offset_avail, > + .calib_phase_avail =3D ad7606b_calib_phase_avail, > =C2=A0}; > =C2=A0EXPORT_SYMBOL_NS_GPL(ad7606b_info, "IIO_AD7606"); > =C2=A0 > @@ -177,6 +195,8 @@ const struct ad7606_chip_info ad7606c_16_info =3D { > =C2=A0 .scale_setup_cb =3D ad7606c_16bit_chan_scale_setup, > =C2=A0 .sw_setup_cb =3D ad7606b_sw_mode_setup, > =C2=A0 .offload_storagebits =3D 32, > + .calib_offset_avail =3D ad7606_calib_offset_avail, > + .calib_phase_avail =3D ad7606c_calib_phase_avail, > =C2=A0}; > =C2=A0EXPORT_SYMBOL_NS_GPL(ad7606c_16_info, "IIO_AD7606"); > =C2=A0 > @@ -226,6 +246,8 @@ const struct ad7606_chip_info ad7606c_18_info =3D { > =C2=A0 .scale_setup_cb =3D ad7606c_18bit_chan_scale_setup, > =C2=A0 .sw_setup_cb =3D ad7606b_sw_mode_setup, > =C2=A0 .offload_storagebits =3D 32, > + .calib_offset_avail =3D ad7606c_18bit_calib_offset_avail, > + .calib_phase_avail =3D ad7606c_calib_phase_avail, > =C2=A0}; > =C2=A0EXPORT_SYMBOL_NS_GPL(ad7606c_18_info, "IIO_AD7606"); > =C2=A0 > @@ -683,6 +705,40 @@ static int ad7606_scan_direct(struct iio_dev *indio_= dev, > unsigned int ch, > =C2=A0 return ret; > =C2=A0} > =C2=A0 > +static int ad7606_get_calib_offset(struct ad7606_state *st, int ch, int = *val) > +{ > + int ret; > + > + ret =3D st->bops->reg_read(st, AD7606_CALIB_OFFSET(ch)); > + if (ret < 0) > + return ret; > + > + *val =3D st->chip_info->calib_offset_avail[0] + > + ret * st->chip_info->calib_offset_avail[1]; > + > + return 0; > +} > + > +static int ad7606_get_calib_phase(struct ad7606_state *st, int ch, int *= val, > + =C2=A0 int *val2) > +{ > + int ret; > + > + ret =3D st->bops->reg_read(st, AD7606_CALIB_PHASE(ch)); > + if (ret < 0) > + return ret; > + > + *val =3D 0; > + > + /* > + * ad7606b: phase delay from 0 to 318.75 =CE=BCs in steps of 1.25 =CE= =BCs. > + * ad7606c-16/18: phase delay from 0 =C2=B5s to 255 =C2=B5s in steps of= 1 =C2=B5s. > + */ > + *val2 =3D ret * st->chip_info->calib_phase_avail[1][1]; > + > + return 0; > +} > + > =C2=A0static int ad7606_read_raw(struct iio_dev *indio_dev, > =C2=A0 =C2=A0=C2=A0 struct iio_chan_spec const *chan, > =C2=A0 =C2=A0=C2=A0 int *val, > @@ -717,6 +773,22 @@ static int ad7606_read_raw(struct iio_dev *indio_dev= , > =C2=A0 pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); > =C2=A0 *val =3D DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC, > cnvst_pwm_state.period); > =C2=A0 return IIO_VAL_INT; > + case IIO_CHAN_INFO_CALIBBIAS: > + if (!iio_device_claim_direct(indio_dev)) > + return -EBUSY; > + ret =3D ad7606_get_calib_offset(st, chan->scan_index, val); > + iio_device_release_direct(indio_dev); > + if (ret) > + return ret; > + return IIO_VAL_INT; > + case IIO_CHAN_INFO_CALIBPHASE_DELAY: > + if (!iio_device_claim_direct(indio_dev)) > + return -EBUSY; > + ret =3D ad7606_get_calib_phase(st, chan->scan_index, val, > val2); > + iio_device_release_direct(indio_dev); > + if (ret) > + return ret; > + return IIO_VAL_INT_PLUS_NANO; > =C2=A0 } > =C2=A0 return -EINVAL; > =C2=A0} > @@ -767,6 +839,64 @@ static int ad7606_write_os_hw(struct iio_dev *indio_= dev, > int val) > =C2=A0 return 0; > =C2=A0} > =C2=A0 > +static int ad7606_set_calib_offset(struct ad7606_state *st, int ch, int = val) > +{ > + int start_val, step_val, stop_val; > + > + start_val =3D st->chip_info->calib_offset_avail[0]; > + step_val =3D st->chip_info->calib_offset_avail[1]; > + stop_val =3D st->chip_info->calib_offset_avail[2]; > + > + if (val < start_val || val > stop_val) > + return -EINVAL; > + > + val +=3D start_val; Shouldn't this be val -=3D start_val? I also don't think we have any strict rules in the ABI for units for these = kind of interfaces so using "raw" values is easier. But FWIW, I think we could h= ave this in mv (would naturally depend on scale)=20 - Nuno S=C3=A1