Re: [PATCH 4/5] ufs: core: Add vendor specific ops to handle interrupts

[Bart Van Assche <bvanassche@acm.org>]

On 9/19/25 5:38 AM, Ajay Neeli wrote:
> Some vendors will define their own interrupts, current interrupt service
> routine handles only interrupts defined by the JEDEC standard.
> Add provision to handle vendor specific interrupts by defining vendor
> specific vops.

Yikes. Please comply to the standard or contribute to the standard
instead of using reserved interrupt status bits for vendor-specific
purposes.

> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
> index 5442bb8..7a6dde8 100644
> --- a/drivers/ufs/core/ufshcd.c
> +++ b/drivers/ufs/core/ufshcd.c
> @@ -7069,6 +7069,9 @@ static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
>   	if (intr_status & MCQ_CQ_EVENT_STATUS)
>   		retval |= ufshcd_handle_mcq_cq_events(hba);
>   
> +	if (intr_status & UFSHCD_VENDOR_IS_MASK)
> +		retval |= ufshcd_vops_isr(hba, intr_status);
> +
>   	return retval;
>   }

[ ... ]

> diff --git a/include/ufs/ufshci.h b/include/ufs/ufshci.h
> index 612500a..2844772 100644
> --- a/include/ufs/ufshci.h
> +++ b/include/ufs/ufshci.h
> @@ -185,6 +185,9 @@ static inline u32 ufshci_version(u32 major, u32 minor)
>   #define CRYPTO_ENGINE_FATAL_ERROR		0x40000
>   #define MCQ_CQ_EVENT_STATUS			0x100000
>   
> +/* Other than above mentioned bits are treated as Vendor specific status bits */
> +#define UFSHCD_VENDOR_IS_MASK			0xFFE8F000

That's a violation of the UFSHCI standard. In the UFSHCI standard bits
31:22 and 15:13 are marked as reserved and hence must not be marked as
"vendor specific". Please either drop this patch or remove the
UFSHCD_VENDOR_IS_MASK definition from this patch and remove the
"if (intr_status & UFSHCD_VENDOR_IS_MASK)" condition from the interrupt
handler.

Bart.