From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Jian Yang" <jian.yang@mediatek.com>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Rob Herring" <robh@kernel.org>,
"Jianjun Wang" <jianjun.wang@mediatek.com>
Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Project_Global_Chrome_Upstream_Group@mediatek.com,
Chuanjia.Liu@mediatek.com, Jieyy.Yang@mediatek.com,
Qizhong.Cheng@mediatek.com, Jianguo.Zhang@mediatek.com
Subject: Re: [PATCH v4 1/2] dt-bindings: PCI: mediatek-gen3: Add support for controlling power and reset
Date: Mon, 6 Nov 2023 09:48:51 +0100 [thread overview]
Message-ID: <d2f18887-6920-461c-8c1d-2abd1f7101a0@kernel.org> (raw)
In-Reply-To: <20231106061220.21485-2-jian.yang@mediatek.com>
On 06/11/2023 07:12, Jian Yang wrote:
> From: "jian.yang" <jian.yang@mediatek.com>
>
> Add new properties to support control power supplies and reset pin of
> a downstream component.
>
> Signed-off-by: jian.yang <jian.yang@mediatek.com>
> ---
> .../bindings/pci/mediatek-pcie-gen3.yaml | 30 +++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> index 7e8c7a2a5f9b..a4f6b48d57fa 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -84,6 +84,26 @@ properties:
> items:
> enum: [ phy, mac ]
>
> + vpcie1v8-supply:
> + description:
> + The regulator phandle that provides 1.8V power from root port to a
> + downstream component.
> +
> + vpcie3v3-supply:
> + description:
> + The regulator phandle that provides 3.3V power from root port to a
> + downstream component.
How 3.3V supply can go from root port to downstream? Do you mean that
root port is the regulator itself (regulator provider)?
Sorry, all these supplies look like hacks - stuffing PCI device
properties into the PCI controller node.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-11-06 8:49 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-06 6:12 [PATCH v4 0/2] PCI: mediatek-gen3: Support controlling power supplies Jian Yang
2023-11-06 6:12 ` [PATCH v4 1/2] dt-bindings: PCI: mediatek-gen3: Add support for controlling power and reset Jian Yang
2023-11-06 7:50 ` Krzysztof Kozlowski
2023-11-06 8:25 ` AngeloGioacchino Del Regno
2023-11-06 8:48 ` Krzysztof Kozlowski [this message]
2023-11-06 6:12 ` [PATCH v4 2/2] PCI: mediatek-gen3: Add power and reset control feature for downstream component Jian Yang
2023-11-06 7:53 ` Krzysztof Kozlowski
2023-11-06 8:36 ` AngeloGioacchino Del Regno
2023-11-06 8:46 ` Krzysztof Kozlowski
2023-11-06 8:56 ` AngeloGioacchino Del Regno
2023-11-06 8:23 ` AngeloGioacchino Del Regno
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