From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42BC5C4321E for ; Wed, 19 Oct 2022 14:44:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229870AbiJSOom (ORCPT ); Wed, 19 Oct 2022 10:44:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48038 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231673AbiJSOoP (ORCPT ); Wed, 19 Oct 2022 10:44:15 -0400 Received: from mail-qk1-x72e.google.com (mail-qk1-x72e.google.com [IPv6:2607:f8b0:4864:20::72e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 238491B76DA for ; Wed, 19 Oct 2022 07:30:37 -0700 (PDT) Received: by mail-qk1-x72e.google.com with SMTP id f8so10785452qkg.3 for ; Wed, 19 Oct 2022 07:30:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=rEmIhwLP6JWJlQRt/3w8mhy6Yg1o3TLKHqQiOhMxy0U=; b=ilprgxZy/nxFTTz37DvZ1mP/ydqyP3gwcaRJpuxF1UGyotKOl1P0TiyF+qbRDXAVP+ akYeivho+XgXIdhxz/1VcgkOGZfNaJDsQECdfdTkS6TTo2LVgrhTqAm6ZgwAdYEwfXlO zxfaDJfLj27/AjML/XccPnZwVbKFy9U6IkozVVN5YTtOkJUYLEgBeUy/uDP62/+Tw7lL tMpbux0+ueArUxiap5maUr7qhn1u6sU12qPulUMS8yLmn70JLDoPH+st0+0ZPCAaAHZ7 Dcq0zZ6TK48SG9SefGqm3jvUjdISTD6ETlJmCPAzI73W3Io2vVKh/okOJTkgLCpE94Kt S4jQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=rEmIhwLP6JWJlQRt/3w8mhy6Yg1o3TLKHqQiOhMxy0U=; b=sjXhVB2AVgh+aqUXGGzLsK5ShuvHmKESyCEJIVT8qyvFJTGl1rzdgbl8qxYylqazM8 /1cP1pLG6oRVIhBYyKbhHTIRSW7I/k85/NNGVJGuAqtGuvRHxpCG5NFbzJ0s8tX4tNDS WfuxTh6Myb+khQ7S26lXkHXO3527Nauk7qPjtA+xLcGRSDGOckK29dA1pOixdSj8qCSD 2ISZkcd0W7W0WwHE3V6ofrD4QKhBFRQlVSotOzbauCAITFd0KmBS5dlrjCHpp4SVwXz2 opq94QlRKsjJmy8aGbEnQ13eMw7SWkV9DUs6e158D4M6hp2w8wrBDRoub7c5Bq1x+S9h 74dA== X-Gm-Message-State: ACrzQf0WrI3NAt+p4cznc5vocI2EyuAj2WfhwnYD/ZdCyXtRdqgQWKGv Er0hI28wEDqbM7kXNoQto0/k3o2imd/DFA== X-Google-Smtp-Source: AMsMyM49VXrZGh0Y6/lHBCG4YpU/HQkprtBYeSAxBKwVJI5YDUWZ81RHBa5iViI4NMMV2LjRZt4rPA== X-Received: by 2002:a37:9ac4:0:b0:6ee:caa8:fe2f with SMTP id c187-20020a379ac4000000b006eecaa8fe2fmr5788394qke.638.1666189768362; Wed, 19 Oct 2022 07:29:28 -0700 (PDT) Received: from [192.168.10.124] (pool-72-83-177-149.washdc.east.verizon.net. [72.83.177.149]) by smtp.gmail.com with ESMTPSA id u24-20020a37ab18000000b006bb83c2be40sm4993247qke.59.2022.10.19.07.29.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Oct 2022 07:29:27 -0700 (PDT) Message-ID: Date: Wed, 19 Oct 2022 10:29:26 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.0 Subject: Re: [PATCH v3 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states Content-Language: en-US To: Amjad Ouled-Ameur , Mark Brown , Neil Armstrong , Krzysztof Kozlowski , Jerome Brunet , Martin Blumenstingl , Kevin Hilman , Rob Herring Cc: Da Xue , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org References: <20221004-up-aml-fix-spi-v3-0-89de126fd163@baylibre.com> <20221004-up-aml-fix-spi-v3-1-89de126fd163@baylibre.com> From: Krzysztof Kozlowski In-Reply-To: <20221004-up-aml-fix-spi-v3-1-89de126fd163@baylibre.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 19/10/2022 10:01, Amjad Ouled-Ameur wrote: > SPI pins of the SPICC Controller in Meson-GX needs to be controlled by > pin biais when idle. Therefore define three pinctrl names: > - default: SPI pins are controlled by spi function. > - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled > by spi function. > - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled > by spi function. > > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,meson-gx-spicc > + > + then: > + properties: > + pinctrl-names: > + minItems: 1 > + items: > + - const: default > + - const: idle-high > + - const: idle-low You should also define in such case pinctrl-0 and others. Best regards, Krzysztof