From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71D55364A4; Tue, 16 Jul 2024 07:45:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721115913; cv=none; b=BpJY4c2vgvW1aaiL5gRenfXn8JTx1kHraY2k58ilVenMOK0VVHXLlQ1f6sfCSsXwrCdNIX2S2PGY1IKVPc7Wu7LmD8TITF9cc0hOXjWONpd3ABy8Jf1sS38tDIVmEqSeLVWpEPI62Is4+tb9ocz93+zLGkOIkAEJhZAIi0N4RMk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721115913; c=relaxed/simple; bh=Z9OLOyK8r/W7BwAhKBQti4KYof/TzJVWRH3Fc4mgnGo=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=KuAa1hNwCXtpUROXkV6s/jWGRm6QP0xMQ1KsfUE7g1dJ8Ly5/yUqPU6e0znJDg3iE5H6aOJNnKOP+Gc0eRJj+Ni3367XBbLzk4S8vRSiDn8y1geAymoUpTXsqcei27Uc2YcdENBF7XPYSfAgrQ5DWnFNTbOqytJp+gEDiEQjtLw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JMKwcrct; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JMKwcrct" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 88476C116B1; Tue, 16 Jul 2024 07:45:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721115913; bh=Z9OLOyK8r/W7BwAhKBQti4KYof/TzJVWRH3Fc4mgnGo=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=JMKwcrctJiMnCU4b33u3zVD0FLk+00AbOOSKU2+F55qbClojnJtOtEOqwFfPmaJhF Ig1+WEYo5XzVfGv+VSTZXmuxdXAi1YH/GJrD4/bLkDrqQBlWZ+VPLJDTC4vsprjO9t x1z25r1AUF6yzr/Ar5m7oJnnZPIvleWpuPyqG/E8FxzjTP88GTqw1opxyn6hsrhn+9 Jku6JEWnlaYFIbha9JhLSe1SkMbXrsUjvHVohUD2Cs4xafDEgwTUAbG27oxHOOKJe5 25377GNN2lZAgCgMOagEQnybau81SackSsjskjtS7Ix8JaaCgpv6/u/cz3hRdCGkNS W0zn7uJCjrgkw== Message-ID: Date: Tue, 16 Jul 2024 09:45:05 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 7/8] arm64: dts: qcom: Add support for multimedia clock controllers To: Taniya Das , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Bartosz Golaszewski Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, quic_imrashai@quicinc.com, quic_jkona@quicinc.com References: <20240715-sa8775p-mm-v3-v1-0-badaf35ed670@quicinc.com> <20240715-sa8775p-mm-v3-v1-7-badaf35ed670@quicinc.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 15/07/2024 10:23, Taniya Das wrote: > Add support for video, camera, display0 and display1 clock > controllers on SA8775P platform. > > Signed-off-by: Taniya Das > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 56 +++++++++++++++++++++++++++++++++++ > 1 file changed, 56 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 23f1b2e5e624..8fd68a8aa916 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -2911,6 +2911,47 @@ llcc: system-cache-controller@9200000 { > interrupts = ; > }; > > + videocc: clock-controller@abf0000 { > + compatible = "qcom,sa8775p-videocc"; > + reg = <0x0 0x0abf0000 0x0 0x10000>; > + clocks = <&gcc GCC_VIDEO_AHB_CLK>, > + <&rpmhcc RPMH_CXO_CLK>, > + <&rpmhcc RPMH_CXO_CLK_A>, > + <&sleep_clk>; > + power-domains = <&rpmhpd SA8775P_MMCX>; Not sure if these are correct. I had impression the clocks are going away from sa8775p? Best regards, Krzysztof