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From: Jessica Zhang <quic_jesszhan@quicinc.com>
To: John Watts <contact@jookia.org>, <dri-devel@lists.freedesktop.org>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>, <devicetree@vger.kernel.org>,
	Sam Ravnborg <sam@ravnborg.org>,
	Chris Morgan <macromorgan@hotmail.com>,
	<linux-kernel@vger.kernel.org>, Jagan Teki <jagan@edgeble.ai>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Shawn Guo <shawnguo@kernel.org>
Subject: Re: [RFC PATCH 5/8] drm/panel: nv3052c: Allow specifying registers per panel
Date: Wed, 13 Sep 2023 14:34:38 -0700	[thread overview]
Message-ID: <d46ee183-a010-e585-c47c-fa3229eafb33@quicinc.com> (raw)
In-Reply-To: <20230911090206.3121440-6-contact@jookia.org>



On 9/11/2023 2:02 AM, John Watts wrote:
> Panel initialization registers are per-display and not tied to the
> controller itself. Different panels will specify their own registers.
> Attach the sequences to the panel info struct so future panels
> can specify their own sequences.
> 
> Signed-off-by: John Watts <contact@jookia.org>
> ---
>   .../gpu/drm/panel/panel-newvision-nv3052c.c   | 25 ++++++++++++-------
>   1 file changed, 16 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c
> index 307335d0f1fc..b2ad9b3a5eb7 100644
> --- a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c
> +++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c
> @@ -20,11 +20,18 @@
>   #include <drm/drm_modes.h>
>   #include <drm/drm_panel.h>
>   
> +struct nv3052c_reg {
> +	u8 cmd;
> +	u8 val;
> +};
> +
>   struct nv3052c_panel_info {
>   	const struct drm_display_mode *display_modes;
>   	unsigned int num_modes;
>   	u16 width_mm, height_mm;
>   	u32 bus_format, bus_flags;
> +	const struct nv3052c_reg *panel_regs;
> +	int panel_regs_len;

Hi John,

Having a separate panel_regs_len field seems a bit unnecessary to me.

Looks like it's only being called in the panel prepare() and I don't 
seen any reason why we shouldn't just call the ARRAY_SIZE() macro there.

Thanks,

Jessica Zhang

>   };
>   
>   struct nv3052c {
> @@ -36,12 +43,7 @@ struct nv3052c {
>   	struct gpio_desc *reset_gpio;
>   };
>   
> -struct nv3052c_reg {
> -	u8 cmd;
> -	u8 val;
> -};
> -
> -static const struct nv3052c_reg nv3052c_panel_regs[] = {
> +static const struct nv3052c_reg ltk035c5444t_panel_regs[] = {
>   	// EXTC Command set enable, select page 1
>   	{ 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x01 },
>   	// Mostly unknown registers
> @@ -244,6 +246,7 @@ static inline struct nv3052c *to_nv3052c(struct drm_panel *panel)
>   static int nv3052c_prepare(struct drm_panel *panel)
>   {
>   	struct nv3052c *priv = to_nv3052c(panel);
> +	const struct nv3052c_reg *panel_regs = priv->panel_info->panel_regs;
>   	struct mipi_dbi *dbi = &priv->dbi;
>   	unsigned int i;
>   	int err;
> @@ -260,9 +263,11 @@ static int nv3052c_prepare(struct drm_panel *panel)
>   	gpiod_set_value_cansleep(priv->reset_gpio, 0);
>   	msleep(150);
>   
> -	for (i = 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) {
> -		err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd,
> -				       nv3052c_panel_regs[i].val);
> +	int panel_regs_len = priv->panel_info->panel_regs_len;
> +
> +	for (i = 0; i < panel_regs_len; i++) {
> +		err = mipi_dbi_command(dbi, panel_regs[i].cmd,
> +				       panel_regs[i].val);
>   
>   		if (err) {
>   			dev_err(priv->dev, "Unable to set register: %d\n", err);
> @@ -466,6 +471,8 @@ static const struct nv3052c_panel_info ltk035c5444t_panel_info = {
>   	.height_mm = 64,
>   	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
>   	.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
> +	.panel_regs = ltk035c5444t_panel_regs,
> +	.panel_regs_len = ARRAY_SIZE(ltk035c5444t_panel_regs),
>   };
>   
>   static const struct spi_device_id nv3052c_ids[] = {
> -- 
> 2.42.0
> 

  reply	other threads:[~2023-09-13 21:35 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-11  9:01 [RFC PATCH 0/8] Add FS035VG158 panel John Watts
2023-09-11  9:01 ` [RFC PATCH 1/8] drm/panel: nv3052c: Document known register names John Watts
2023-09-13 21:43   ` Jessica Zhang
2023-09-14  4:12     ` John Watts
2023-09-14 20:27       ` Jessica Zhang
2023-09-11  9:02 ` [RFC PATCH 2/8] drm/panel: nv3052c: Add SPI device IDs John Watts
2023-09-15 21:50   ` Jessica Zhang
2023-09-11  9:02 ` [RFC PATCH 3/8] drm/panel: nv3052c: Sleep for 150ms after reset John Watts
2023-09-11  9:02 ` [RFC PATCH 4/8] drm/panel: nv3052c: Wait before entering sleep mode John Watts
2023-09-11  9:02 ` [RFC PATCH 5/8] drm/panel: nv3052c: Allow specifying registers per panel John Watts
2023-09-13 21:34   ` Jessica Zhang [this message]
2023-09-14  4:09     ` John Watts
2023-09-14 20:22       ` Jessica Zhang
2023-09-15 21:23   ` Jessica Zhang
2023-09-11  9:02 ` [RFC PATCH 6/8] drm/panel: nv3052c: Add Fascontek FS035VG158 LCD display John Watts
2023-09-11  9:02 ` [RFC PATCH 7/8] dt-bindings: vendor-prefixes: Add fascontek John Watts
2023-09-11  9:41   ` Krzysztof Kozlowski
2023-09-11  9:02 ` [RFC PATCH 8/8] dt-bindings: display: panel: add Fascontek FS035VG158 panel John Watts
2023-09-11  9:41   ` Krzysztof Kozlowski
2023-09-11  9:49     ` John Watts
2023-09-11 11:49       ` Krzysztof Kozlowski
2023-09-11 16:47         ` John Watts
2023-09-12  6:55           ` Krzysztof Kozlowski
2023-09-12  8:56             ` John Watts
2023-09-17 20:24     ` John Watts
2023-09-18 12:06       ` Krzysztof Kozlowski

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