From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Conor Dooley <conor.dooley@microchip.com>,
mturquette@baylibre.com, sboyd@kernel.org, aou@eecs.berkeley.edu,
paul.walmsley@sifive.com, palmer@rivosinc.com,
a.zummo@towertech.it, alexandre.belloni@bootlin.com,
robh+dt@kernel.org, krzk+dt@kernel.org
Cc: daire.mcnamara@microchip.com, linux-rtc@vger.kernel.org,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v1 1/7] dt-bindings: clk: mpfs document msspll dri registers
Date: Fri, 8 Apr 2022 16:54:57 +0200 [thread overview]
Message-ID: <d4a182e8-9469-6dfb-af97-6e570d4c5ab1@linaro.org> (raw)
In-Reply-To: <20220408143646.3693104-2-conor.dooley@microchip.com>
On 08/04/2022 16:36, Conor Dooley wrote:
> As there are two sections of registers that are responsible for clock
> configuration on the PolarFire SoC: add the dynamic reconfiguration
> interface section to the binding & describe what each of the sections
> are used for.
(...)
>
> reg:
> - maxItems: 1
> + items:
> + - description: |
> + clock config registers:
> + These registers contain enable, reset & divider tables for the, cpu, axi, ahb and
> + rtc/mtimer reference clocks as well as enable and reset for the peripheral clocks.
> + - description: |
> + mss pll dri registers:
> + Block of registers responsible for dynamic reconfiguration of the mss pll
>
This breaks all of DTS - in and out of tree.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-04-08 14:55 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-08 14:36 [PATCH v1 0/7] Add rtc refclk support for PolarFire SoC Conor Dooley
2022-04-08 14:36 ` [PATCH v1 1/7] dt-bindings: clk: mpfs document msspll dri registers Conor Dooley
2022-04-08 14:54 ` Krzysztof Kozlowski [this message]
2022-04-08 14:36 ` [PATCH v1 2/7] dt-bindings: clk: mpfs: add defines for two new clocks Conor Dooley
2022-04-08 14:36 ` [PATCH v1 3/7] dt-bindings: rtc: add refclk to mpfs-rtc Conor Dooley
2022-04-08 14:56 ` Krzysztof Kozlowski
2022-04-08 14:36 ` [PATCH v1 4/7] clk: microchip: mpfs: re-parent the configurable clocks Conor Dooley
2022-04-08 14:36 ` [PATCH v1 5/7] clk: microchip: mpfs: rename sys_base to base Conor Dooley
2022-04-08 14:36 ` [PATCH v1 6/7] clk: microchip: mpfs: add RTCREF clock control Conor Dooley
2022-04-08 14:36 ` [PATCH v1 7/7] riscv: dts: microchip: reparent mpfs clocks Conor Dooley
2022-04-08 14:57 ` [PATCH v1 0/7] Add rtc refclk support for PolarFire SoC Krzysztof Kozlowski
2022-04-08 15:29 ` Conor Dooley
2022-04-09 7:14 ` Conor Dooley
2022-04-09 10:48 ` Krzysztof Kozlowski
2022-04-09 20:17 ` Conor Dooley
2022-04-10 8:12 ` Krzysztof Kozlowski
2022-04-09 10:45 ` Krzysztof Kozlowski
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