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Tue, 14 Apr 2026 00:20:54 -0700 (PDT) X-Received: by 2002:a05:6a20:a114:b0:39f:2c96:e0b8 with SMTP id adf61e73a8af0-39fe3dccf95mr17470690637.26.1776151254068; Tue, 14 Apr 2026 00:20:54 -0700 (PDT) Received: from [10.206.105.200] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82f0c330925sm15512185b3a.15.2026.04.14.00.20.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 14 Apr 2026 00:20:53 -0700 (PDT) Message-ID: Date: Tue, 14 Apr 2026 12:50:45 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH 07/11] media: iris: Rename clock and power domain macros to use vcodec prefix To: Mukesh Ojha Cc: Bryan O'Donoghue , Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joerg Roedel , Will Deacon , Robin Murphy , Bjorn Andersson , Konrad Dybcio , Stefan Schmidt , Hans Verkuil , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev References: <20260414-glymur-v1-0-7d3d1cf57b16@oss.qualcomm.com> <20260414-glymur-v1-7-7d3d1cf57b16@oss.qualcomm.com> <20260414063846.fixumrttkfqwydch@hu-mojha-hyd.qualcomm.com> Content-Language: en-US From: Vishnu Reddy In-Reply-To: <20260414063846.fixumrttkfqwydch@hu-mojha-hyd.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: fdjFqxcBBDqrUcR2oK9CoRikblH969UZ X-Authority-Analysis: v=2.4 cv=RoH16imK c=1 sm=1 tr=0 ts=69ddead7 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=ZzSlGUpipctRqpDlwUAA:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE0MDA2NiBTYWx0ZWRfXydV7gljrkqEc aLGkwKJ5ToFFLTLezpoDrFFCPvf9TMnhtd0sTFskMH5Am/0YLfqQSEeYNDU9O0W1gncWblarbM7 E/rhJ3QByjZpfC2+sqoc2FSVvj6zaEmu+UMKQskeN8w3NjeQMU0URGrOnP5m9wO4Nh2gnmQzPdX I7ypLatbeFegltZowCGbwhFf2T18TdfCvkFSk9gyOMc+h44YGN6NKdJYnfJ5vbwr9xDPKLMIFaw s/pyIUPWAd9Po0L0lWMN/t9OnaU6U7x6SWUJeMmR2xLQybAKO1ZuEO2TS8gh5Sd6nBIyqeLTWbY epaZoICLnkaVAebCeEx4AhYaOI7inHt5Dy4nX7nim3Q9IWoKWpK9f/QRV28Lfk4/ka2GHxhEZPG Dc+F5SSV3GWTf+lMyTYZvbEEgZZrusQKP8zPA8j8/uPwzOL+S667KxSF2ZM2CVegpZrBdYQbVF1 ApVc+3UEjfpLiKkiI+A== X-Proofpoint-GUID: fdjFqxcBBDqrUcR2oK9CoRikblH969UZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-14_01,2026-04-13_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 spamscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 phishscore=0 suspectscore=0 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604140066 On 4/14/2026 12:08 PM, Mukesh Ojha wrote: > On Tue, Apr 14, 2026 at 10:30:03AM +0530, Vishnu Reddy wrote: >> The current clock and power domain enum names are too generic. Rename >> them with a vcodec prefix to make the names more meaningful and to easily >> accommodate vcodec1 enums for the secondary core in the following patches. > patches ? > >> This patch only renames the macros and does not introduce any functional >> changes. > "this patch" or "patches" are not preferred.. write the commit text in > imperative mood.. Ack, will correct in the next revision. Thanks, Vishnu Reddy >> Signed-off-by: Vishnu Reddy >> --- >> .../platform/qcom/iris/iris_platform_common.h | 12 ++++---- >> .../media/platform/qcom/iris/iris_platform_gen1.c | 6 ++-- >> .../media/platform/qcom/iris/iris_platform_gen2.c | 6 ++-- >> .../platform/qcom/iris/iris_platform_sc7280.h | 10 +++---- >> .../platform/qcom/iris/iris_platform_sm8750.h | 12 ++++---- >> drivers/media/platform/qcom/iris/iris_vpu3x.c | 25 ++++++++-------- >> drivers/media/platform/qcom/iris/iris_vpu4x.c | 30 ++++++++++--------- >> drivers/media/platform/qcom/iris/iris_vpu_common.c | 35 +++++++++++----------- >> 8 files changed, 70 insertions(+), 66 deletions(-) >> >> diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h >> index 55ff6137d9a9..30e9d4d288c6 100644 >> --- a/drivers/media/platform/qcom/iris/iris_platform_common.h >> +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h >> @@ -49,14 +49,14 @@ extern const struct iris_platform_data sm8650_data; >> extern const struct iris_platform_data sm8750_data; >> >> enum platform_clk_type { >> - IRIS_AXI_CLK, /* AXI0 in case of platforms with multiple AXI clocks */ >> + IRIS_AXI_VCODEC_CLK, >> IRIS_CTRL_CLK, >> IRIS_AHB_CLK, >> - IRIS_HW_CLK, >> - IRIS_HW_AHB_CLK, >> - IRIS_AXI1_CLK, >> + IRIS_VCODEC_CLK, >> + IRIS_VCODEC_AHB_CLK, >> + IRIS_AXI_CTRL_CLK, >> IRIS_CTRL_FREERUN_CLK, >> - IRIS_HW_FREERUN_CLK, >> + IRIS_VCODEC_FREERUN_CLK, >> IRIS_BSE_HW_CLK, >> IRIS_VPP0_HW_CLK, >> IRIS_VPP1_HW_CLK, >> @@ -206,7 +206,7 @@ struct icc_vote_data { >> >> enum platform_pm_domain_type { >> IRIS_CTRL_POWER_DOMAIN, >> - IRIS_HW_POWER_DOMAIN, >> + IRIS_VCODEC_POWER_DOMAIN, >> IRIS_VPP0_HW_POWER_DOMAIN, >> IRIS_VPP1_HW_POWER_DOMAIN, >> IRIS_APV_HW_POWER_DOMAIN, >> diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/drivers/media/platform/qcom/iris/iris_platform_gen1.c >> index df8e6bf9430e..be6a631f8ede 100644 >> --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c >> +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c >> @@ -284,9 +284,9 @@ static const char * const sm8250_pmdomain_table[] = { "venus", "vcodec0" }; >> static const char * const sm8250_opp_pd_table[] = { "mx" }; >> >> static const struct platform_clk_data sm8250_clk_table[] = { >> - {IRIS_AXI_CLK, "iface" }, >> - {IRIS_CTRL_CLK, "core" }, >> - {IRIS_HW_CLK, "vcodec0_core" }, >> + {IRIS_AXI_VCODEC_CLK, "iface" }, >> + {IRIS_CTRL_CLK, "core" }, >> + {IRIS_VCODEC_CLK, "vcodec0_core" }, >> }; >> >> static const char * const sm8250_opp_clk_table[] = { >> diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c >> index 5da90d47f9c6..47c6b650f0b4 100644 >> --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c >> +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c >> @@ -780,9 +780,9 @@ static const char * const sm8550_pmdomain_table[] = { "venus", "vcodec0" }; >> static const char * const sm8550_opp_pd_table[] = { "mxc", "mmcx" }; >> >> static const struct platform_clk_data sm8550_clk_table[] = { >> - {IRIS_AXI_CLK, "iface" }, >> - {IRIS_CTRL_CLK, "core" }, >> - {IRIS_HW_CLK, "vcodec0_core" }, >> + {IRIS_AXI_VCODEC_CLK, "iface" }, >> + {IRIS_CTRL_CLK, "core" }, >> + {IRIS_VCODEC_CLK, "vcodec0_core" }, >> }; >> >> static const char * const sm8550_opp_clk_table[] = { >> diff --git a/drivers/media/platform/qcom/iris/iris_platform_sc7280.h b/drivers/media/platform/qcom/iris/iris_platform_sc7280.h >> index 0ec8f334df67..6b783e524b81 100644 >> --- a/drivers/media/platform/qcom/iris/iris_platform_sc7280.h >> +++ b/drivers/media/platform/qcom/iris/iris_platform_sc7280.h >> @@ -16,11 +16,11 @@ static const struct bw_info sc7280_bw_table_dec[] = { >> static const char * const sc7280_opp_pd_table[] = { "cx" }; >> >> static const struct platform_clk_data sc7280_clk_table[] = { >> - {IRIS_CTRL_CLK, "core" }, >> - {IRIS_AXI_CLK, "iface" }, >> - {IRIS_AHB_CLK, "bus" }, >> - {IRIS_HW_CLK, "vcodec_core" }, >> - {IRIS_HW_AHB_CLK, "vcodec_bus" }, >> + {IRIS_CTRL_CLK, "core" }, >> + {IRIS_AXI_VCODEC_CLK, "iface" }, >> + {IRIS_AHB_CLK, "bus" }, >> + {IRIS_VCODEC_CLK, "vcodec_core" }, >> + {IRIS_VCODEC_AHB_CLK, "vcodec_bus" }, >> }; >> >> static const char * const sc7280_opp_clk_table[] = { >> diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8750.h b/drivers/media/platform/qcom/iris/iris_platform_sm8750.h >> index 719056656a5b..f843f13251c5 100644 >> --- a/drivers/media/platform/qcom/iris/iris_platform_sm8750.h >> +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8750.h >> @@ -11,12 +11,12 @@ static const char * const sm8750_clk_reset_table[] = { >> }; >> >> static const struct platform_clk_data sm8750_clk_table[] = { >> - {IRIS_AXI_CLK, "iface" }, >> - {IRIS_CTRL_CLK, "core" }, >> - {IRIS_HW_CLK, "vcodec0_core" }, >> - {IRIS_AXI1_CLK, "iface1" }, >> - {IRIS_CTRL_FREERUN_CLK, "core_freerun" }, >> - {IRIS_HW_FREERUN_CLK, "vcodec0_core_freerun" }, >> + {IRIS_AXI_VCODEC_CLK, "iface" }, >> + {IRIS_CTRL_CLK, "core" }, >> + {IRIS_VCODEC_CLK, "vcodec0_core" }, >> + {IRIS_AXI_CTRL_CLK, "iface1" }, >> + {IRIS_CTRL_FREERUN_CLK, "core_freerun" }, >> + {IRIS_VCODEC_FREERUN_CLK, "vcodec0_core_freerun" }, >> }; >> >> #endif >> diff --git a/drivers/media/platform/qcom/iris/iris_vpu3x.c b/drivers/media/platform/qcom/iris/iris_vpu3x.c >> index fe4423b951b1..1f0a3a47d87f 100644 >> --- a/drivers/media/platform/qcom/iris/iris_vpu3x.c >> +++ b/drivers/media/platform/qcom/iris/iris_vpu3x.c >> @@ -209,7 +209,7 @@ static int iris_vpu33_power_off_controller(struct iris_core *core) >> >> disable_power: >> iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]); >> - iris_disable_unprepare_clock(core, IRIS_AXI_CLK); >> + iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK); >> >> return 0; >> } >> @@ -218,36 +218,37 @@ static int iris_vpu35_power_on_hw(struct iris_core *core) >> { >> int ret; >> >> - ret = iris_enable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); >> + ret = iris_enable_power_domains(core, >> + core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]); >> if (ret) >> return ret; >> >> - ret = iris_prepare_enable_clock(core, IRIS_AXI_CLK); >> + ret = iris_prepare_enable_clock(core, IRIS_AXI_VCODEC_CLK); >> if (ret) >> goto err_disable_power; >> >> - ret = iris_prepare_enable_clock(core, IRIS_HW_FREERUN_CLK); >> + ret = iris_prepare_enable_clock(core, IRIS_VCODEC_FREERUN_CLK); >> if (ret) >> goto err_disable_axi_clk; >> >> - ret = iris_prepare_enable_clock(core, IRIS_HW_CLK); >> + ret = iris_prepare_enable_clock(core, IRIS_VCODEC_CLK); >> if (ret) >> goto err_disable_hw_free_clk; >> >> - ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true); >> + ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN], true); >> if (ret) >> goto err_disable_hw_clk; >> >> return 0; >> >> err_disable_hw_clk: >> - iris_disable_unprepare_clock(core, IRIS_HW_CLK); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_CLK); >> err_disable_hw_free_clk: >> - iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_FREERUN_CLK); >> err_disable_axi_clk: >> - iris_disable_unprepare_clock(core, IRIS_AXI_CLK); >> + iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK); >> err_disable_power: >> - iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); >> + iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]); >> >> return ret; >> } >> @@ -256,8 +257,8 @@ static void iris_vpu35_power_off_hw(struct iris_core *core) >> { >> iris_vpu33_power_off_hardware(core); >> >> - iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK); >> - iris_disable_unprepare_clock(core, IRIS_AXI_CLK); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_FREERUN_CLK); >> + iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK); >> } >> >> const struct vpu_ops iris_vpu3_ops = { >> diff --git a/drivers/media/platform/qcom/iris/iris_vpu4x.c b/drivers/media/platform/qcom/iris/iris_vpu4x.c >> index a8db02ce5c5e..4082d331d2f3 100644 >> --- a/drivers/media/platform/qcom/iris/iris_vpu4x.c >> +++ b/drivers/media/platform/qcom/iris/iris_vpu4x.c >> @@ -27,7 +27,8 @@ static int iris_vpu4x_genpd_set_hwmode(struct iris_core *core, bool hw_mode, u32 >> { >> int ret; >> >> - ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], hw_mode); >> + ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN], >> + hw_mode); >> if (ret) >> return ret; >> >> @@ -63,7 +64,7 @@ static int iris_vpu4x_genpd_set_hwmode(struct iris_core *core, bool hw_mode, u32 >> dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VPP0_HW_POWER_DOMAIN], >> !hw_mode); >> restore_hw_domain_mode: >> - dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], !hw_mode); >> + dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN], !hw_mode); >> >> return ret; >> } >> @@ -162,15 +163,15 @@ static int iris_vpu4x_enable_hardware_clocks(struct iris_core *core, u32 efuse_v >> { >> int ret; >> >> - ret = iris_prepare_enable_clock(core, IRIS_AXI_CLK); >> + ret = iris_prepare_enable_clock(core, IRIS_AXI_VCODEC_CLK); >> if (ret) >> return ret; >> >> - ret = iris_prepare_enable_clock(core, IRIS_HW_FREERUN_CLK); >> + ret = iris_prepare_enable_clock(core, IRIS_VCODEC_FREERUN_CLK); >> if (ret) >> goto disable_axi_clock; >> >> - ret = iris_prepare_enable_clock(core, IRIS_HW_CLK); >> + ret = iris_prepare_enable_clock(core, IRIS_VCODEC_CLK); >> if (ret) >> goto disable_hw_free_run_clock; >> >> @@ -198,11 +199,11 @@ static int iris_vpu4x_enable_hardware_clocks(struct iris_core *core, u32 efuse_v >> disable_bse_hw_clock: >> iris_disable_unprepare_clock(core, IRIS_BSE_HW_CLK); >> disable_hw_clock: >> - iris_disable_unprepare_clock(core, IRIS_HW_CLK); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_CLK); >> disable_hw_free_run_clock: >> - iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_FREERUN_CLK); >> disable_axi_clock: >> - iris_disable_unprepare_clock(core, IRIS_AXI_CLK); >> + iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK); >> >> return ret; >> } >> @@ -216,9 +217,9 @@ static void iris_vpu4x_disable_hardware_clocks(struct iris_core *core, u32 efuse >> iris_disable_unprepare_clock(core, IRIS_VPP0_HW_CLK); >> >> iris_disable_unprepare_clock(core, IRIS_BSE_HW_CLK); >> - iris_disable_unprepare_clock(core, IRIS_HW_CLK); >> - iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK); >> - iris_disable_unprepare_clock(core, IRIS_AXI_CLK); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_CLK); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_FREERUN_CLK); >> + iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK); >> } >> >> static int iris_vpu4x_power_on_hardware(struct iris_core *core) >> @@ -226,7 +227,8 @@ static int iris_vpu4x_power_on_hardware(struct iris_core *core) >> u32 efuse_value = readl(core->reg_base + WRAPPER_EFUSE_MONITOR); >> int ret; >> >> - ret = iris_enable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); >> + ret = iris_enable_power_domains(core, >> + core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]); >> if (ret) >> return ret; >> >> @@ -278,7 +280,7 @@ static int iris_vpu4x_power_on_hardware(struct iris_core *core) >> iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs >> [IRIS_VPP0_HW_POWER_DOMAIN]); >> disable_hw_power_domain: >> - iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); >> + iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]); >> >> return ret; >> } >> @@ -356,7 +358,7 @@ static void iris_vpu4x_power_off_hardware(struct iris_core *core) >> iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs >> [IRIS_VPP0_HW_POWER_DOMAIN]); >> >> - iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); >> + iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]); >> } >> >> const struct vpu_ops iris_vpu4x_ops = { >> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c >> index bfd1e762c38e..006fd3ffc752 100644 >> --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c >> +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c >> @@ -213,7 +213,7 @@ int iris_vpu_power_off_controller(struct iris_core *core) >> disable_power: >> iris_disable_unprepare_clock(core, IRIS_AHB_CLK); >> iris_disable_unprepare_clock(core, IRIS_CTRL_CLK); >> - iris_disable_unprepare_clock(core, IRIS_AXI_CLK); >> + iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK); >> iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]); >> >> return 0; >> @@ -221,10 +221,10 @@ int iris_vpu_power_off_controller(struct iris_core *core) >> >> void iris_vpu_power_off_hw(struct iris_core *core) >> { >> - dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], false); >> - iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); >> - iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); >> - iris_disable_unprepare_clock(core, IRIS_HW_CLK); >> + dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN], false); >> + iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_AHB_CLK); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_CLK); >> } >> >> void iris_vpu_power_off(struct iris_core *core) >> @@ -251,7 +251,7 @@ int iris_vpu_power_on_controller(struct iris_core *core) >> if (ret) >> goto err_disable_power; >> >> - ret = iris_prepare_enable_clock(core, IRIS_AXI_CLK); >> + ret = iris_prepare_enable_clock(core, IRIS_AXI_VCODEC_CLK); >> if (ret) >> goto err_disable_power; >> >> @@ -268,7 +268,7 @@ int iris_vpu_power_on_controller(struct iris_core *core) >> err_disable_ctrl_clock: >> iris_disable_unprepare_clock(core, IRIS_CTRL_CLK); >> err_disable_axi_clock: >> - iris_disable_unprepare_clock(core, IRIS_AXI_CLK); >> + iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK); >> err_disable_power: >> iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]); >> >> @@ -279,30 +279,31 @@ int iris_vpu_power_on_hw(struct iris_core *core) >> { >> int ret; >> >> - ret = iris_enable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); >> + ret = iris_enable_power_domains(core, >> + core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]); >> if (ret) >> return ret; >> >> - ret = iris_prepare_enable_clock(core, IRIS_HW_CLK); >> + ret = iris_prepare_enable_clock(core, IRIS_VCODEC_CLK); >> if (ret) >> goto err_disable_power; >> >> - ret = iris_prepare_enable_clock(core, IRIS_HW_AHB_CLK); >> + ret = iris_prepare_enable_clock(core, IRIS_VCODEC_AHB_CLK); >> if (ret && ret != -ENOENT) >> goto err_disable_hw_clock; >> >> - ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true); >> + ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN], true); >> if (ret) >> goto err_disable_hw_ahb_clock; >> >> return 0; >> >> err_disable_hw_ahb_clock: >> - iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_AHB_CLK); >> err_disable_hw_clock: >> - iris_disable_unprepare_clock(core, IRIS_HW_CLK); >> + iris_disable_unprepare_clock(core, IRIS_VCODEC_CLK); >> err_disable_power: >> - iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); >> + iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]); >> >> return ret; >> } >> @@ -362,7 +363,7 @@ int iris_vpu35_vpu4x_power_off_controller(struct iris_core *core) >> disable_power: >> iris_disable_unprepare_clock(core, IRIS_CTRL_CLK); >> iris_disable_unprepare_clock(core, IRIS_CTRL_FREERUN_CLK); >> - iris_disable_unprepare_clock(core, IRIS_AXI1_CLK); >> + iris_disable_unprepare_clock(core, IRIS_AXI_CTRL_CLK); >> >> iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]); >> >> @@ -379,7 +380,7 @@ int iris_vpu35_vpu4x_power_on_controller(struct iris_core *core) >> if (ret) >> return ret; >> >> - ret = iris_prepare_enable_clock(core, IRIS_AXI1_CLK); >> + ret = iris_prepare_enable_clock(core, IRIS_AXI_CTRL_CLK); >> if (ret) >> goto err_disable_power; >> >> @@ -396,7 +397,7 @@ int iris_vpu35_vpu4x_power_on_controller(struct iris_core *core) >> err_disable_ctrl_free_clk: >> iris_disable_unprepare_clock(core, IRIS_CTRL_FREERUN_CLK); >> err_disable_axi1_clk: >> - iris_disable_unprepare_clock(core, IRIS_AXI1_CLK); >> + iris_disable_unprepare_clock(core, IRIS_AXI_CTRL_CLK); >> err_disable_power: >> iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]); >> >> >> -- >> 2.34.1 >>