From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C904FC433FE for ; Tue, 24 May 2022 03:29:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232291AbiEXD3i (ORCPT ); Mon, 23 May 2022 23:29:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233522AbiEXD3i (ORCPT ); Mon, 23 May 2022 23:29:38 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C8B0C9A99F; Mon, 23 May 2022 20:29:35 -0700 (PDT) X-UUID: 5a719f18c2c6450882ea7ce05a4f03bb-20220524 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:28cf4b3c-13b5-47c8-82ed-22aecfad8be9,OB:0,LO B:10,IP:0,URL:25,TC:0,Content:0,EDM:0,RT:0,SF:51,FILE:0,RULE:Release_Ham,A CTION:release,TS:76 X-CID-INFO: VERSION:1.1.5,REQID:28cf4b3c-13b5-47c8-82ed-22aecfad8be9,OB:0,LOB: 10,IP:0,URL:25,TC:0,Content:0,EDM:0,RT:0,SF:51,FILE:0,RULE:Spam_GS981B3D,A CTION:quarantine,TS:76 X-CID-META: VersionHash:2a19b09,CLOUDID:77bf617a-5ef6-470b-96c9-bdb8ced32786,C OID:387ed2adb1b8,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:1,File:nil,QS:0,BEC:nil X-UUID: 5a719f18c2c6450882ea7ce05a4f03bb-20220524 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 236856401; Tue, 24 May 2022 11:29:31 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 24 May 2022 11:29:30 +0800 Received: from mhfsdcap04 (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Tue, 24 May 2022 11:29:28 +0800 Message-ID: Subject: Re: [PATCH v10 01/21] dt-bindings: mediatek,dpi: Add DPINTF compatible From: Chunfeng Yun To: Guillaume Ranquet , Chun-Kuang Hu , Philipp Zabel , "David Airlie" , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Matthias Brugger , Kishon Vijay Abraham I , "Vinod Koul" , Helge Deller , CK Hu , Jitao shi CC: Markus Schneider-Pargmann , , , , , , , Date: Tue, 24 May 2022 11:29:28 +0800 In-Reply-To: <20220523104758.29531-2-granquet@baylibre.com> References: <20220523104758.29531-1-granquet@baylibre.com> <20220523104758.29531-2-granquet@baylibre.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, 2022-05-23 at 12:47 +0200, Guillaume Ranquet wrote: > From: Markus Schneider-Pargmann > > DPINTF is similar to DPI but does not have the exact same feature set > or register layouts. > > DPINTF is the sink of the display pipeline that is connected to the > DisplayPort controller and encoder unit. It takes the same clocks as > DPI. > > Signed-off-by: Markus Schneider-Pargmann > Signed-off-by: Guillaume Ranquet > --- > .../bindings/display/mediatek/mediatek,dpi.yaml | 13 ++++++++--- > -- > 1 file changed, 8 insertions(+), 5 deletions(-) > > diff --git > a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yam > l > b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yam > l > index dd2896a40ff0..6d9f6c11806e 100644 > --- > a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yam > l > +++ > b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yam > l > @@ -4,16 +4,16 @@ > $id: > http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml# > $schema: http://devicetree.org/meta-schemas/core.yaml# > > -title: mediatek DPI Controller Device Tree Bindings > +title: mediatek DPI/DPINTF Controller > > maintainers: > - CK Hu > - Jitao shi > > description: | > - The Mediatek DPI function block is a sink of the display subsystem > and > - provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a > parallel > - output bus. > + The Mediatek DPI and DPINTF function blocks are a sink of the > display > + subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 > pixel data on a > + parallel output bus. > > properties: > compatible: > @@ -23,6 +23,7 @@ properties: > - mediatek,mt8173-dpi > - mediatek,mt8183-dpi > - mediatek,mt8192-dpi > + - mediatek,mt8195-dpintf > > reg: > maxItems: 1 > @@ -35,12 +36,14 @@ properties: > - description: Pixel Clock > - description: Engine Clock > - description: DPI PLL > + - description: Optional CK CG Clock > > clock-names: > items: > - const: pixel > - const: engine > - const: pll > + - const: ck_cg 'ck_cg' seems not a exact clock names, could you pleas check it again with DE. > > pinctrl-0: true > pinctrl-1: true > @@ -54,7 +57,7 @@ properties: > $ref: /schemas/graph.yaml#/properties/port > description: > Output port node. This port should be connected to the input > port of an > - attached HDMI or LVDS encoder chip. > + attached HDMI, LVDS or DisplayPort encoder chip. > > required: > - compatible