[PATCH v2 0/9] Add support for Sonoff iHost RV1126 Smart Home Gateway

[PATCH v2 0/9] Add support for Sonoff iHost RV1126 Smart Home Gateway

[Tim Lunn]

Sonoff iHost is gateway device designed to provide a Smart Home Hub,
most notably it includes builtin radios for Wifi, BT and Zigbee, which
make it suitable SBC for use with many of the open home automation
platforms. It is availabe in two versions, first is based on
Rockchip RV1126 and 4GB DDR4 RAM. There is a second version based off
the RV1109 dual core SoC and 2GB RAM.

Features:
- Rockchip RV1126 (or RV1109)
- 4GB DDR4
- 8GB eMMC
- microSD slot
- RMII Ethernet PHY
- 1x USB 2.0 Host
- 1x USB 2.0 OTG
- Realtek RTL8723DS WiFi/BT
- EFR32MG21 Silabs Zigbee radio
- Speaker/Microphone

This patch series adds the various device tree nodes required to
support this device. It also adds the initial dts for this device,
This work was largely based off the device trees for mainline
Edgeble Neu2 and downstream Rockchip rv1126-evb-v13 configs.
It has been adapted with relevant peripherals and GPIO pins for the
iHost.

Implemented in this series are most of the core periperhals including
Ethernet, Wifi, BT, Zigbee and RTC. Sound and USB will be added in a
later series.

Changes in v2:
- i2c: clarify commit message
- Address review comments from Heiko
- Split out rv1109.dtsi to new patch
- Collect Robh Ack for dt-bindings patch

Tim Lunn (9):
  ARM: dts: rockchip: rv1126: Add alternate UART pins
  ARM: dts: rockchip: rv1126: Serial aliases
  i2c: rk3x: Adjust offset for i2c2 on rv1126
  ARM: dts: rockchip: rv1126: Add i2c2 nodes
  ARM: dts: rockchip: rv1126: Split up rgmii1 pinctrl
  ARM: dts: rockchip: rv1126: Add ethernet alias
  ARM: dts: rockchip: Add rv1109 SoC
  ARM: dts: Add Sonoff iHost Smart Home Hub
  dt-bindings: arm: rockchip: Add Sonoff iHost

 .../devicetree/bindings/arm/rockchip.yaml     |   7 +
 arch/arm/boot/dts/rockchip/Makefile           |   2 +
 .../boot/dts/rockchip/rv1109-sonoff-ihost.dts |  13 +
 arch/arm/boot/dts/rockchip/rv1109.dtsi        |  23 +
 .../dts/rockchip/rv1126-edgeble-neu2-io.dts   |   2 +-
 .../arm/boot/dts/rockchip/rv1126-pinctrl.dtsi |  72 +++-
 .../boot/dts/rockchip/rv1126-sonoff-ihost.dts |  13 +
 .../dts/rockchip/rv1126-sonoff-ihost.dtsi     | 407 ++++++++++++++++++
 arch/arm/boot/dts/rockchip/rv1126.dtsi        |  21 +
 drivers/i2c/busses/i2c-rk3x.c                 |   7 +-
 10 files changed, 551 insertions(+), 16 deletions(-)
 create mode 100644 arch/arm/boot/dts/rockchip/rv1109-sonoff-ihost.dts
 create mode 100644 arch/arm/boot/dts/rockchip/rv1109.dtsi
 create mode 100644 arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dts
 create mode 100644 arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi

-- 
2.40.1

[PATCH v2 1/9] ARM: dts: rockchip: rv1126: Add alternate UART pins

[Tim Lunn]

Add uart3m2_xfer and uart4m2_xfer pins for Rockchip RV1126. These are
used as serial ports for the indicator and Zigbee radio on the iHost.

Signed-off-by: Tim Lunn <tim@feathertop.org>
---

(no changes since v1)

 arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
index bb34b0c9cb4a..4f85b7b3fc4c 100644
--- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
@@ -263,6 +263,14 @@ uart3m0_xfer: uart3m0-xfer {
 				/* uart3_tx_m0 */
 				<3 RK_PC6 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
+		uart3m2_xfer: uart3m2-xfer {
+			rockchip,pins =
+				/* uart3_rx_m2 */
+				<3 RK_PA1 4 &pcfg_pull_up>,
+				/* uart3_tx_m2 */
+				<3 RK_PA0 4 &pcfg_pull_up>;
+		};
 	};
 	uart4 {
 		/omit-if-no-ref/
@@ -273,6 +281,14 @@ uart4m0_xfer: uart4m0-xfer {
 				/* uart4_tx_m0 */
 				<3 RK_PA4 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
+		uart4m2_xfer: uart4m2-xfer {
+			rockchip,pins =
+				/* uart4_rx_m2 */
+				<1 RK_PD4 3 &pcfg_pull_up>,
+				/* uart4_tx_m2 */
+				<1 RK_PD5 3 &pcfg_pull_up>;
+		};
 	};
 	uart5 {
 		/omit-if-no-ref/
-- 
2.40.1

[PATCH v2 2/9] ARM: dts: rockchip: rv1126: Serial aliases

[Tim Lunn]

Add serial aliases for uart nodes so that serial devices are created

Signed-off-by: Tim Lunn <tim@feathertop.org>
---

(no changes since v1)

 arch/arm/boot/dts/rockchip/rv1126.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
index 9ccd1bad6229..6c5c928f06c7 100644
--- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
@@ -21,6 +21,11 @@ / {
 
 	aliases {
 		i2c0 = &i2c0;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
 	};
 
 	cpus {
-- 
2.40.1

Re: [PATCH v2 2/9] ARM: dts: rockchip: rv1126: Serial aliases

[Krzysztof Kozlowski]

On 22/11/2023 13:22, Tim Lunn wrote:
> Add serial aliases for uart nodes so that serial devices are created

Why?

Aliases are per-board, not per DTSI.

Best regards,
Krzysztof

[PATCH v2 3/9] i2c: rk3x: Adjust offset for i2c2 on rv1126

[Tim Lunn]

Rockchip RV1126 has special case mask bits for i2c2.

i2c2 wasnt previously enabled in rv1126.dtsi, adding DT node alone
is not sufficient to enable i2c2. This patch fixes the i2c2 bus.

Signed-off-by: Tim Lunn <tim@feathertop.org>
---

Changes in v2:
- i2c: clarify commit message

 drivers/i2c/busses/i2c-rk3x.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
index a044ca0c35a1..151927466d1d 100644
--- a/drivers/i2c/busses/i2c-rk3x.c
+++ b/drivers/i2c/busses/i2c-rk3x.c
@@ -1288,8 +1288,11 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
 			return -EINVAL;
 		}
 
-		/* 27+i: write mask, 11+i: value */
-		value = BIT(27 + bus_nr) | BIT(11 + bus_nr);
+		if (i2c->soc_data == &rv1126_soc_data && bus_nr == 2)
+			value = BIT(20) | BIT(4);
+		else
+			/* 27+i: write mask, 11+i: value */
+			value = BIT(27 + bus_nr) | BIT(11 + bus_nr);
 
 		ret = regmap_write(grf, i2c->soc_data->grf_offset, value);
 		if (ret != 0) {
-- 
2.40.1

Re: [PATCH v2 3/9] i2c: rk3x: Adjust offset for i2c2 on rv1126

[Andi Shyti]

Hi Tim,

On Wed, Nov 22, 2023 at 11:22:26PM +1100, Tim Lunn wrote:
> Rockchip RV1126 has special case mask bits for i2c2.
> 
> i2c2 wasnt previously enabled in rv1126.dtsi, adding DT node alone
> is not sufficient to enable i2c2. This patch fixes the i2c2 bus.

If I don't have sufficient information about the hardware this
description is completely meaningless to me.

> Signed-off-by: Tim Lunn <tim@feathertop.org>
> ---
> 
> Changes in v2:
> - i2c: clarify commit message
> 
>  drivers/i2c/busses/i2c-rk3x.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
> index a044ca0c35a1..151927466d1d 100644
> --- a/drivers/i2c/busses/i2c-rk3x.c
> +++ b/drivers/i2c/busses/i2c-rk3x.c
> @@ -1288,8 +1288,11 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
>  			return -EINVAL;
>  		}
>  
> -		/* 27+i: write mask, 11+i: value */
> -		value = BIT(27 + bus_nr) | BIT(11 + bus_nr);
> +		if (i2c->soc_data == &rv1126_soc_data && bus_nr == 2)
> +			value = BIT(20) | BIT(4);

Any chance to put a comment here as it is in the other
assignment?

Are the two assignment mutually exclusive?

Heiko, any chance to take a look here?

Thanks,
Andi

> +		else
> +			/* 27+i: write mask, 11+i: value */
> +			value = BIT(27 + bus_nr) | BIT(11 + bus_nr);
>  
>  		ret = regmap_write(grf, i2c->soc_data->grf_offset, value);
>  		if (ret != 0) {
> -- 
> 2.40.1
> 

Re: [PATCH v2 3/9] i2c: rk3x: Adjust offset for i2c2 on rv1126

[Heiko Stübner]

Hi Andi,

Am Sonntag, 26. November 2023, 20:43:11 CET schrieb Andi Shyti:
> Hi Tim,
> 
> On Wed, Nov 22, 2023 at 11:22:26PM +1100, Tim Lunn wrote:
> > Rockchip RV1126 has special case mask bits for i2c2.
> > 
> > i2c2 wasnt previously enabled in rv1126.dtsi, adding DT node alone
> > is not sufficient to enable i2c2. This patch fixes the i2c2 bus.
> 
> If I don't have sufficient information about the hardware this
> description is completely meaningless to me.
> 
> > Signed-off-by: Tim Lunn <tim@feathertop.org>
> > ---
> > 
> > Changes in v2:
> > - i2c: clarify commit message
> > 
> >  drivers/i2c/busses/i2c-rk3x.c | 7 +++++--
> >  1 file changed, 5 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
> > index a044ca0c35a1..151927466d1d 100644
> > --- a/drivers/i2c/busses/i2c-rk3x.c
> > +++ b/drivers/i2c/busses/i2c-rk3x.c
> > @@ -1288,8 +1288,11 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
> >  			return -EINVAL;
> >  		}
> >  
> > -		/* 27+i: write mask, 11+i: value */
> > -		value = BIT(27 + bus_nr) | BIT(11 + bus_nr);
> > +		if (i2c->soc_data == &rv1126_soc_data && bus_nr == 2)
> > +			value = BIT(20) | BIT(4);
> 
> Any chance to put a comment here as it is in the other
> assignment?
> 
> Are the two assignment mutually exclusive?
> 
> Heiko, any chance to take a look here?

So the background is, that on some SoCs Rockchip implemented to
different variants for the i2c controller. One new-style controller
that they started using in rk3066 and are using even today.

For these old socs they kept the "old" controller block as a sort
of fallback if the new thing didn't work out, and the bit above is
switching between the 

Hence that is limited to rk3066, rk3188 and seemingly the rv1126.
And while the bits controlling the i2c controllers on the original socs
are order sequentially in the grf register, the rv1126 seems to have
those bits in non-consequtive places.


So TL;DR the change itself is likely good, and hopefully there won't
be any more of those, as all the new socs don't need this anymore.

I do agree with the request for a comment describing the issue
in the code, but otherwise

Acked-by: Heiko Stuebner <heiko@sntech.de>

Re: [PATCH v2 3/9] i2c: rk3x: Adjust offset for i2c2 on rv1126

[Tim Lunn]

On 11/27/23 11:26, Heiko Stübner wrote:
> Hi Andi,
>
> Am Sonntag, 26. November 2023, 20:43:11 CET schrieb Andi Shyti:
>> Hi Tim,
>>
>> On Wed, Nov 22, 2023 at 11:22:26PM +1100, Tim Lunn wrote:
>>> Rockchip RV1126 has special case mask bits for i2c2.
>>>
>>> i2c2 wasnt previously enabled in rv1126.dtsi, adding DT node alone
>>> is not sufficient to enable i2c2. This patch fixes the i2c2 bus.
>> If I don't have sufficient information about the hardware this
>> description is completely meaningless to me.
>>
>>> Signed-off-by: Tim Lunn <tim@feathertop.org>
>>> ---
>>>
>>> Changes in v2:
>>> - i2c: clarify commit message
>>>
>>>   drivers/i2c/busses/i2c-rk3x.c | 7 +++++--
>>>   1 file changed, 5 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
>>> index a044ca0c35a1..151927466d1d 100644
>>> --- a/drivers/i2c/busses/i2c-rk3x.c
>>> +++ b/drivers/i2c/busses/i2c-rk3x.c
>>> @@ -1288,8 +1288,11 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
>>>   			return -EINVAL;
>>>   		}
>>>   
>>> -		/* 27+i: write mask, 11+i: value */
>>> -		value = BIT(27 + bus_nr) | BIT(11 + bus_nr);
>>> +		if (i2c->soc_data == &rv1126_soc_data && bus_nr == 2)
>>> +			value = BIT(20) | BIT(4);
>> Any chance to put a comment here as it is in the other
>> assignment?
>>
>> Are the two assignment mutually exclusive?
Yes they are mutually exclusive, and its only i2c2 that is 
non-sequential (as per Heikos description below).
>>
>> Heiko, any chance to take a look here?
> So the background is, that on some SoCs Rockchip implemented to
> different variants for the i2c controller. One new-style controller
> that they started using in rk3066 and are using even today.
>
> For these old socs they kept the "old" controller block as a sort
> of fallback if the new thing didn't work out, and the bit above is
> switching between the
>
> Hence that is limited to rk3066, rk3188 and seemingly the rv1126.
> And while the bits controlling the i2c controllers on the original socs
> are order sequentially in the grf register, the rv1126 seems to have
> those bits in non-consequtive places.
>
>
> So TL;DR the change itself is likely good, and hopefully there won't
> be any more of those, as all the new socs don't need this anymore.
rv1108 is also similar but different bits again (only going off the BSP 
sources).
I dont have hardware or the TRM to validate this on rv1108.
>
> I do agree with the request for a comment describing the issue
> in the code, but otherwise

I will fix this.

> Acked-by: Heiko Stuebner <heiko@sntech.de>
>
>

Re: [PATCH v2 3/9] i2c: rk3x: Adjust offset for i2c2 on rv1126

[Andi Shyti]

Hi Heiko and Tim,

On Mon, Nov 27, 2023 at 09:11:57PM +1100, Tim Lunn wrote:
> On 11/27/23 11:26, Heiko Stübner wrote:
> > Am Sonntag, 26. November 2023, 20:43:11 CET schrieb Andi Shyti:
> > > On Wed, Nov 22, 2023 at 11:22:26PM +1100, Tim Lunn wrote:
> > > > Rockchip RV1126 has special case mask bits for i2c2.
> > > > 
> > > > i2c2 wasnt previously enabled in rv1126.dtsi, adding DT node alone
> > > > is not sufficient to enable i2c2. This patch fixes the i2c2 bus.
> > > If I don't have sufficient information about the hardware this
> > > description is completely meaningless to me.
> > > 
> > > > Signed-off-by: Tim Lunn <tim@feathertop.org>
> > > > ---
> > > > 
> > > > Changes in v2:
> > > > - i2c: clarify commit message
> > > > 
> > > >   drivers/i2c/busses/i2c-rk3x.c | 7 +++++--
> > > >   1 file changed, 5 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
> > > > index a044ca0c35a1..151927466d1d 100644
> > > > --- a/drivers/i2c/busses/i2c-rk3x.c
> > > > +++ b/drivers/i2c/busses/i2c-rk3x.c
> > > > @@ -1288,8 +1288,11 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
> > > >   			return -EINVAL;
> > > >   		}
> > > > -		/* 27+i: write mask, 11+i: value */
> > > > -		value = BIT(27 + bus_nr) | BIT(11 + bus_nr);
> > > > +		if (i2c->soc_data == &rv1126_soc_data && bus_nr == 2)
> > > > +			value = BIT(20) | BIT(4);
> > > Any chance to put a comment here as it is in the other
> > > assignment?
> > > 
> > > Are the two assignment mutually exclusive?
> Yes they are mutually exclusive, and its only i2c2 that is non-sequential
> (as per Heikos description below).
> > > 
> > > Heiko, any chance to take a look here?
> > So the background is, that on some SoCs Rockchip implemented to
> > different variants for the i2c controller. One new-style controller
> > that they started using in rk3066 and are using even today.
> > 
> > For these old socs they kept the "old" controller block as a sort
> > of fallback if the new thing didn't work out, and the bit above is
> > switching between the
> > 
> > Hence that is limited to rk3066, rk3188 and seemingly the rv1126.
> > And while the bits controlling the i2c controllers on the original socs
> > are order sequentially in the grf register, the rv1126 seems to have
> > those bits in non-consequtive places.
> > 
> > 
> > So TL;DR the change itself is likely good, and hopefully there won't
> > be any more of those, as all the new socs don't need this anymore.
> rv1108 is also similar but different bits again (only going off the BSP
> sources).
> I dont have hardware or the TRM to validate this on rv1108.
> > 
> > I do agree with the request for a comment describing the issue
> > in the code, but otherwise
> 
> I will fix this.
> 
> > Acked-by: Heiko Stuebner <heiko@sntech.de>

Thanks for your ack and answer. Will wait, then for Tim's v2.

Andi

[PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Tim Lunn]

Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126

Signed-off-by: Tim Lunn <tim@feathertop.org>
---

(no changes since v1)

 arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
 arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
index 4f85b7b3fc4c..167a48afa3a4 100644
--- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
@@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
 				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
 		};
 	};
+	i2c2 {
+		/omit-if-no-ref/
+		i2c2_xfer: i2c2-xfer {
+			rockchip,pins =
+				/* i2c2_scl */
+				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
+				/* i2c2_sda */
+				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
+		};
+	};
 	pwm2 {
 		/omit-if-no-ref/
 		pwm2m0_pins: pwm2m0-pins {
diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
index 6c5c928f06c7..cf1df75df418 100644
--- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
@@ -21,6 +21,7 @@ / {
 
 	aliases {
 		i2c0 = &i2c0;
+		i2c2 = &i2c2;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -236,6 +237,20 @@ i2c0: i2c@ff3f0000 {
 		status = "disabled";
 	};
 
+	i2c2: i2c@ff400000 {
+		compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
+		reg = <0xff400000 0x1000>;
+		interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,grf = <&pmugrf>;
+		clocks = <&pmucru CLK_I2C2>, <&pmucru PCLK_I2C2>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
 	uart1: serial@ff410000 {
 		compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart";
 		reg = <0xff410000 0x100>;
-- 
2.40.1

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Krzysztof Kozlowski]

On 22/11/2023 13:22, Tim Lunn wrote:
> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
> 
> Signed-off-by: Tim Lunn <tim@feathertop.org>
> ---
> 
> (no changes since v1)
> 
>  arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
>  arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
>  2 files changed, 25 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> index 4f85b7b3fc4c..167a48afa3a4 100644
> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
>  				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
>  		};
>  	};
> +	i2c2 {
> +		/omit-if-no-ref/
> +		i2c2_xfer: i2c2-xfer {
> +			rockchip,pins =
> +				/* i2c2_scl */
> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
> +				/* i2c2_sda */
> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
> +		};
> +	};
>  	pwm2 {
>  		/omit-if-no-ref/
>  		pwm2m0_pins: pwm2m0-pins {
> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
> index 6c5c928f06c7..cf1df75df418 100644
> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
> @@ -21,6 +21,7 @@ / {
>  
>  	aliases {
>  		i2c0 = &i2c0;
> +		i2c2 = &i2c2;

No, this should be per-board to match board labeling/schematics.



Best regards,
Krzysztof

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Tim Lunn]

Hi Krzysztof

On 11/22/23 23:29, Krzysztof Kozlowski wrote:
> On 22/11/2023 13:22, Tim Lunn wrote:
>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
>>
>> Signed-off-by: Tim Lunn <tim@feathertop.org>
>> ---
>>
>> (no changes since v1)
>>
>>   arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
>>   arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
>>   2 files changed, 25 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>> index 4f85b7b3fc4c..167a48afa3a4 100644
>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
>>   				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
>>   		};
>>   	};
>> +	i2c2 {
>> +		/omit-if-no-ref/
>> +		i2c2_xfer: i2c2-xfer {
>> +			rockchip,pins =
>> +				/* i2c2_scl */
>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
>> +				/* i2c2_sda */
>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
>> +		};
>> +	};
>>   	pwm2 {
>>   		/omit-if-no-ref/
>>   		pwm2m0_pins: pwm2m0-pins {
>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>> index 6c5c928f06c7..cf1df75df418 100644
>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>> @@ -21,6 +21,7 @@ / {
>>   
>>   	aliases {
>>   		i2c0 = &i2c0;
>> +		i2c2 = &i2c2;
> No, this should be per-board to match board labeling/schematics.
>
I was just following what seemed to be done in some other Rockchip 
<SoC>.dtsi files. I will move this alias
and the other ones for serial and ethernet into the board file instead then.

Regards
   Tim
>
> Best regards,
> Krzysztof
>

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Heiko Stübner]

Hi Krzysztof,

Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
> On 22/11/2023 13:22, Tim Lunn wrote:
> > Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
> > 
> > Signed-off-by: Tim Lunn <tim@feathertop.org>
> > ---
> > 
> > (no changes since v1)
> > 
> >  arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
> >  arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
> >  2 files changed, 25 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> > index 4f85b7b3fc4c..167a48afa3a4 100644
> > --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> > +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> > @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
> >  				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
> >  		};
> >  	};
> > +	i2c2 {
> > +		/omit-if-no-ref/
> > +		i2c2_xfer: i2c2-xfer {
> > +			rockchip,pins =
> > +				/* i2c2_scl */
> > +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
> > +				/* i2c2_sda */
> > +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
> > +		};
> > +	};
> >  	pwm2 {
> >  		/omit-if-no-ref/
> >  		pwm2m0_pins: pwm2m0-pins {
> > diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
> > index 6c5c928f06c7..cf1df75df418 100644
> > --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
> > +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
> > @@ -21,6 +21,7 @@ / {
> >  
> >  	aliases {
> >  		i2c0 = &i2c0;
> > +		i2c2 = &i2c2;
> 
> No, this should be per-board to match board labeling/schematics.

At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
and also all board schematics I've seen so far are very consistent for
these ... i2c2 for example is labled i2c2 both in the pins in the socs
and also in the board-schematics using them.

So while I can agree that things like mmc-aliases might be board-specific,
I do think aliases for the core busses should be able to live in the soc dtsi
as for all Rockchip SoCs so far?


Heiko

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Krzysztof Kozlowski]

On 27/11/2023 00:06, Heiko Stübner wrote:
> Hi Krzysztof,
> 
> Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
>> On 22/11/2023 13:22, Tim Lunn wrote:
>>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
>>>
>>> Signed-off-by: Tim Lunn <tim@feathertop.org>
>>> ---
>>>
>>> (no changes since v1)
>>>
>>>  arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
>>>  arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
>>>  2 files changed, 25 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>> index 4f85b7b3fc4c..167a48afa3a4 100644
>>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
>>>  				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
>>>  		};
>>>  	};
>>> +	i2c2 {
>>> +		/omit-if-no-ref/
>>> +		i2c2_xfer: i2c2-xfer {
>>> +			rockchip,pins =
>>> +				/* i2c2_scl */
>>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
>>> +				/* i2c2_sda */
>>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
>>> +		};
>>> +	};
>>>  	pwm2 {
>>>  		/omit-if-no-ref/
>>>  		pwm2m0_pins: pwm2m0-pins {
>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>> index 6c5c928f06c7..cf1df75df418 100644
>>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>> @@ -21,6 +21,7 @@ / {
>>>  
>>>  	aliases {
>>>  		i2c0 = &i2c0;
>>> +		i2c2 = &i2c2;
>>
>> No, this should be per-board to match board labeling/schematics.
> 
> At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
> and also all board schematics I've seen so far are very consistent for
> these ... i2c2 for example is labled i2c2 both in the pins in the socs
> and also in the board-schematics using them.
> 
> So while I can agree that things like mmc-aliases might be board-specific,
> I do think aliases for the core busses should be able to live in the soc dtsi
> as for all Rockchip SoCs so far?

If you do not list here all aliases, it is already board-specific, isn't it?

https://lore.kernel.org/linux-rockchip/CAK8P3a25iYksubCnQb1-e5yj=crEsK37RB9Hn4ZGZMwcVVrG7g@mail.gmail.com/

Best regards,
Krzysztof

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Tim Lunn]

Hi

On 11/27/23 17:52, Krzysztof Kozlowski wrote:
> On 27/11/2023 00:06, Heiko Stübner wrote:
>> Hi Krzysztof,
>>
>> Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
>>> On 22/11/2023 13:22, Tim Lunn wrote:
>>>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
>>>>
>>>> Signed-off-by: Tim Lunn <tim@feathertop.org>
>>>> ---
>>>>
>>>> (no changes since v1)
>>>>
>>>>   arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
>>>>   arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
>>>>   2 files changed, 25 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>> index 4f85b7b3fc4c..167a48afa3a4 100644
>>>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
>>>>   				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
>>>>   		};
>>>>   	};
>>>> +	i2c2 {
>>>> +		/omit-if-no-ref/
>>>> +		i2c2_xfer: i2c2-xfer {
>>>> +			rockchip,pins =
>>>> +				/* i2c2_scl */
>>>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
>>>> +				/* i2c2_sda */
>>>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
>>>> +		};
>>>> +	};
>>>>   	pwm2 {
>>>>   		/omit-if-no-ref/
>>>>   		pwm2m0_pins: pwm2m0-pins {
>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>> index 6c5c928f06c7..cf1df75df418 100644
>>>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>> @@ -21,6 +21,7 @@ / {
>>>>   
>>>>   	aliases {
>>>>   		i2c0 = &i2c0;
>>>> +		i2c2 = &i2c2;
>>> No, this should be per-board to match board labeling/schematics.
>> At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
>> and also all board schematics I've seen so far are very consistent for
>> these ... i2c2 for example is labled i2c2 both in the pins in the socs
>> and also in the board-schematics using them.
>>
>> So while I can agree that things like mmc-aliases might be board-specific,
>> I do think aliases for the core busses should be able to live in the soc dtsi
>> as for all Rockchip SoCs so far?
> If you do not list here all aliases, it is already board-specific, isn't it?
>
> https://lore.kernel.org/linux-rockchip/CAK8P3a25iYksubCnQb1-e5yj=crEsK37RB9Hn4ZGZMwcVVrG7g@mail.gmail.com/
I had only added aliases for nodes that are implemented. RV1126 has 6 
i2c busses but so far not all these exist in the soc.dtsi.

Regards
    Tim
> Best regards,
> Krzysztof
>

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Krzysztof Kozlowski]

On 27/11/2023 10:23, Tim Lunn wrote:
> Hi
> 
> On 11/27/23 17:52, Krzysztof Kozlowski wrote:
>> On 27/11/2023 00:06, Heiko Stübner wrote:
>>> Hi Krzysztof,
>>>
>>> Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
>>>> On 22/11/2023 13:22, Tim Lunn wrote:
>>>>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
>>>>>
>>>>> Signed-off-by: Tim Lunn <tim@feathertop.org>
>>>>> ---
>>>>>
>>>>> (no changes since v1)
>>>>>
>>>>>   arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
>>>>>   arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
>>>>>   2 files changed, 25 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>> index 4f85b7b3fc4c..167a48afa3a4 100644
>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
>>>>>   				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
>>>>>   		};
>>>>>   	};
>>>>> +	i2c2 {
>>>>> +		/omit-if-no-ref/
>>>>> +		i2c2_xfer: i2c2-xfer {
>>>>> +			rockchip,pins =
>>>>> +				/* i2c2_scl */
>>>>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
>>>>> +				/* i2c2_sda */
>>>>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
>>>>> +		};
>>>>> +	};
>>>>>   	pwm2 {
>>>>>   		/omit-if-no-ref/
>>>>>   		pwm2m0_pins: pwm2m0-pins {
>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>> index 6c5c928f06c7..cf1df75df418 100644
>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>> @@ -21,6 +21,7 @@ / {
>>>>>   
>>>>>   	aliases {
>>>>>   		i2c0 = &i2c0;
>>>>> +		i2c2 = &i2c2;
>>>> No, this should be per-board to match board labeling/schematics.
>>> At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
>>> and also all board schematics I've seen so far are very consistent for
>>> these ... i2c2 for example is labled i2c2 both in the pins in the socs
>>> and also in the board-schematics using them.
>>>
>>> So while I can agree that things like mmc-aliases might be board-specific,
>>> I do think aliases for the core busses should be able to live in the soc dtsi
>>> as for all Rockchip SoCs so far?
>> If you do not list here all aliases, it is already board-specific, isn't it?
>>
>> https://lore.kernel.org/linux-rockchip/CAK8P3a25iYksubCnQb1-e5yj=crEsK37RB9Hn4ZGZMwcVVrG7g@mail.gmail.com/
> I had only added aliases for nodes that are implemented. RV1126 has 6 
> i2c busses but so far not all these exist in the soc.dtsi.
> 

OK, that would explain why you have only two. Anyway, it is just generic
guideline, so up to Heiko what to do with it.

Best regards,
Krzysztof

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Heiko Stübner]

Am Montag, 27. November 2023, 10:27:41 CET schrieb Krzysztof Kozlowski:
> On 27/11/2023 10:23, Tim Lunn wrote:
> > Hi
> > 
> > On 11/27/23 17:52, Krzysztof Kozlowski wrote:
> >> On 27/11/2023 00:06, Heiko Stübner wrote:
> >>> Hi Krzysztof,
> >>>
> >>> Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
> >>>> On 22/11/2023 13:22, Tim Lunn wrote:
> >>>>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
> >>>>>
> >>>>> Signed-off-by: Tim Lunn <tim@feathertop.org>
> >>>>> ---
> >>>>>
> >>>>> (no changes since v1)
> >>>>>
> >>>>>   arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
> >>>>>   arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
> >>>>>   2 files changed, 25 insertions(+)
> >>>>>
> >>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> >>>>> index 4f85b7b3fc4c..167a48afa3a4 100644
> >>>>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> >>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> >>>>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
> >>>>>   				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
> >>>>>   		};
> >>>>>   	};
> >>>>> +	i2c2 {
> >>>>> +		/omit-if-no-ref/
> >>>>> +		i2c2_xfer: i2c2-xfer {
> >>>>> +			rockchip,pins =
> >>>>> +				/* i2c2_scl */
> >>>>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
> >>>>> +				/* i2c2_sda */
> >>>>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
> >>>>> +		};
> >>>>> +	};
> >>>>>   	pwm2 {
> >>>>>   		/omit-if-no-ref/
> >>>>>   		pwm2m0_pins: pwm2m0-pins {
> >>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
> >>>>> index 6c5c928f06c7..cf1df75df418 100644
> >>>>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
> >>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
> >>>>> @@ -21,6 +21,7 @@ / {
> >>>>>   
> >>>>>   	aliases {
> >>>>>   		i2c0 = &i2c0;
> >>>>> +		i2c2 = &i2c2;
> >>>> No, this should be per-board to match board labeling/schematics.
> >>> At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
> >>> and also all board schematics I've seen so far are very consistent for
> >>> these ... i2c2 for example is labled i2c2 both in the pins in the socs
> >>> and also in the board-schematics using them.
> >>>
> >>> So while I can agree that things like mmc-aliases might be board-specific,
> >>> I do think aliases for the core busses should be able to live in the soc dtsi
> >>> as for all Rockchip SoCs so far?
> >> If you do not list here all aliases, it is already board-specific, isn't it?
> >>
> >> https://lore.kernel.org/linux-rockchip/CAK8P3a25iYksubCnQb1-e5yj=crEsK37RB9Hn4ZGZMwcVVrG7g@mail.gmail.com/
> > I had only added aliases for nodes that are implemented. RV1126 has 6 
> > i2c busses but so far not all these exist in the soc.dtsi.
> > 
> 
> OK, that would explain why you have only two. Anyway, it is just generic
> guideline, so up to Heiko what to do with it.

People see "uart2-tx" on their pin-header description and then of course
want to use ttyS2 ... same with reading i2c2-sda on the pin-header and then
running i2cdetect on said i2c2 dev node.

And even if i2c1 is not populated (would even be very rare), then people
would still expect i2c2 to be named that way.

As this is the same for _every_ board, it doesn't really make sense to
duplicate it every time. Which I guess is similar to what I wrote in reply
to the mail you linked above :-) .


It's different for mmc, where this naming scheme isn't normally used,
so we (mostly?) migrated to them being in the board-specific alias section.

Thanks
Heiko

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Tim Lunn]

On 11/27/23 20:45, Heiko Stübner wrote:
> Am Montag, 27. November 2023, 10:27:41 CET schrieb Krzysztof Kozlowski:
>> On 27/11/2023 10:23, Tim Lunn wrote:
>>> Hi
>>>
>>> On 11/27/23 17:52, Krzysztof Kozlowski wrote:
>>>> On 27/11/2023 00:06, Heiko Stübner wrote:
>>>>> Hi Krzysztof,
>>>>>
>>>>> Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
>>>>>> On 22/11/2023 13:22, Tim Lunn wrote:
>>>>>>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
>>>>>>>
>>>>>>> Signed-off-by: Tim Lunn <tim@feathertop.org>
>>>>>>> ---
>>>>>>>
>>>>>>> (no changes since v1)
>>>>>>>
>>>>>>>    arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
>>>>>>>    arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
>>>>>>>    2 files changed, 25 insertions(+)
>>>>>>>
>>>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>>>> index 4f85b7b3fc4c..167a48afa3a4 100644
>>>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>>>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
>>>>>>>    				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
>>>>>>>    		};
>>>>>>>    	};
>>>>>>> +	i2c2 {
>>>>>>> +		/omit-if-no-ref/
>>>>>>> +		i2c2_xfer: i2c2-xfer {
>>>>>>> +			rockchip,pins =
>>>>>>> +				/* i2c2_scl */
>>>>>>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
>>>>>>> +				/* i2c2_sda */
>>>>>>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
>>>>>>> +		};
>>>>>>> +	};
>>>>>>>    	pwm2 {
>>>>>>>    		/omit-if-no-ref/
>>>>>>>    		pwm2m0_pins: pwm2m0-pins {
>>>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>>>> index 6c5c928f06c7..cf1df75df418 100644
>>>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>>>> @@ -21,6 +21,7 @@ / {
>>>>>>>    
>>>>>>>    	aliases {
>>>>>>>    		i2c0 = &i2c0;
>>>>>>> +		i2c2 = &i2c2;
>>>>>> No, this should be per-board to match board labeling/schematics.
>>>>> At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
>>>>> and also all board schematics I've seen so far are very consistent for
>>>>> these ... i2c2 for example is labled i2c2 both in the pins in the socs
>>>>> and also in the board-schematics using them.
>>>>>
>>>>> So while I can agree that things like mmc-aliases might be board-specific,
>>>>> I do think aliases for the core busses should be able to live in the soc dtsi
>>>>> as for all Rockchip SoCs so far?
>>>> If you do not list here all aliases, it is already board-specific, isn't it?
>>>>
>>>> https://lore.kernel.org/linux-rockchip/CAK8P3a25iYksubCnQb1-e5yj=crEsK37RB9Hn4ZGZMwcVVrG7g@mail.gmail.com/
>>> I had only added aliases for nodes that are implemented. RV1126 has 6
>>> i2c busses but so far not all these exist in the soc.dtsi.
>>>
>> OK, that would explain why you have only two. Anyway, it is just generic
>> guideline, so up to Heiko what to do with it.
> People see "uart2-tx" on their pin-header description and then of course
> want to use ttyS2 ... same with reading i2c2-sda on the pin-header and then
> running i2cdetect on said i2c2 dev node.
>
> And even if i2c1 is not populated (would even be very rare), then people
> would still expect i2c2 to be named that way.
>
> As this is the same for _every_ board, it doesn't really make sense to
> duplicate it every time. Which I guess is similar to what I wrote in reply
> to the mail you linked above :-) .
So I will leave the i2c and serial aliases as they are in rv1126.dtsi then?
>
> It's different for mmc, where this naming scheme isn't normally used,
> so we (mostly?) migrated to them being in the board-specific alias section.

What about the ethernet alias,   the MAC is part of the SoC, should this 
stay as it is
in patch 6 from this series, or move to board dtsi?

Regards
   Tim

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Heiko Stübner]

Am Montag, 27. November 2023, 10:58:43 CET schrieb Tim Lunn:
> 
> On 11/27/23 20:45, Heiko Stübner wrote:
> > Am Montag, 27. November 2023, 10:27:41 CET schrieb Krzysztof Kozlowski:
> >> On 27/11/2023 10:23, Tim Lunn wrote:
> >>> Hi
> >>>
> >>> On 11/27/23 17:52, Krzysztof Kozlowski wrote:
> >>>> On 27/11/2023 00:06, Heiko Stübner wrote:
> >>>>> Hi Krzysztof,
> >>>>>
> >>>>> Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
> >>>>>> On 22/11/2023 13:22, Tim Lunn wrote:
> >>>>>>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
> >>>>>>>
> >>>>>>> Signed-off-by: Tim Lunn <tim@feathertop.org>
> >>>>>>> ---
> >>>>>>>
> >>>>>>> (no changes since v1)
> >>>>>>>
> >>>>>>>    arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
> >>>>>>>    arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
> >>>>>>>    2 files changed, 25 insertions(+)
> >>>>>>>
> >>>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> >>>>>>> index 4f85b7b3fc4c..167a48afa3a4 100644
> >>>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> >>>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> >>>>>>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
> >>>>>>>    				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
> >>>>>>>    		};
> >>>>>>>    	};
> >>>>>>> +	i2c2 {
> >>>>>>> +		/omit-if-no-ref/
> >>>>>>> +		i2c2_xfer: i2c2-xfer {
> >>>>>>> +			rockchip,pins =
> >>>>>>> +				/* i2c2_scl */
> >>>>>>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
> >>>>>>> +				/* i2c2_sda */
> >>>>>>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
> >>>>>>> +		};
> >>>>>>> +	};
> >>>>>>>    	pwm2 {
> >>>>>>>    		/omit-if-no-ref/
> >>>>>>>    		pwm2m0_pins: pwm2m0-pins {
> >>>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
> >>>>>>> index 6c5c928f06c7..cf1df75df418 100644
> >>>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
> >>>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
> >>>>>>> @@ -21,6 +21,7 @@ / {
> >>>>>>>    
> >>>>>>>    	aliases {
> >>>>>>>    		i2c0 = &i2c0;
> >>>>>>> +		i2c2 = &i2c2;
> >>>>>> No, this should be per-board to match board labeling/schematics.
> >>>>> At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
> >>>>> and also all board schematics I've seen so far are very consistent for
> >>>>> these ... i2c2 for example is labled i2c2 both in the pins in the socs
> >>>>> and also in the board-schematics using them.
> >>>>>
> >>>>> So while I can agree that things like mmc-aliases might be board-specific,
> >>>>> I do think aliases for the core busses should be able to live in the soc dtsi
> >>>>> as for all Rockchip SoCs so far?
> >>>> If you do not list here all aliases, it is already board-specific, isn't it?
> >>>>
> >>>> https://lore.kernel.org/linux-rockchip/CAK8P3a25iYksubCnQb1-e5yj=crEsK37RB9Hn4ZGZMwcVVrG7g@mail.gmail.com/
> >>> I had only added aliases for nodes that are implemented. RV1126 has 6
> >>> i2c busses but so far not all these exist in the soc.dtsi.
> >>>
> >> OK, that would explain why you have only two. Anyway, it is just generic
> >> guideline, so up to Heiko what to do with it.
> > People see "uart2-tx" on their pin-header description and then of course
> > want to use ttyS2 ... same with reading i2c2-sda on the pin-header and then
> > running i2cdetect on said i2c2 dev node.
> >
> > And even if i2c1 is not populated (would even be very rare), then people
> > would still expect i2c2 to be named that way.
> >
> > As this is the same for _every_ board, it doesn't really make sense to
> > duplicate it every time. Which I guess is similar to what I wrote in reply
> > to the mail you linked above :-) .
> So I will leave the i2c and serial aliases as they are in rv1126.dtsi then?

correct


> > It's different for mmc, where this naming scheme isn't normally used,
> > so we (mostly?) migrated to them being in the board-specific alias section.
> 
> What about the ethernet alias,   the MAC is part of the SoC, should this 
> stay as it is
> in patch 6 from this series, or move to board dtsi?

I think judging from everything above (and the other modern boards
like all rk3588 ones) the ethernet0 alias should move to the board dts(i).

The gmac generally does not have this numbering scheme like i2c or uarts.

Heiko

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Dragan Simic]

On 2023-11-27 11:29, Heiko Stübner wrote:
> Am Montag, 27. November 2023, 10:58:43 CET schrieb Tim Lunn:
>> On 11/27/23 20:45, Heiko Stübner wrote:
>>> It's different for mmc, where this naming scheme isn't normally used,
>>> so we (mostly?) migrated to them being in the board-specific alias 
>>> section.
>> 
>> What about the ethernet alias, the MAC is part of the SoC, should this
>> stay as it is in patch 6 from this series, or move to board dtsi?
> 
> I think judging from everything above (and the other modern boards
> like all rk3588 ones) the ethernet0 alias should move to the board 
> dts(i).
> 
> The gmac generally does not have this numbering scheme like i2c or 
> uarts.

Please note there's already an Ethernet alias defined in rk3399.dtsi, 
even despite not all RK3399-based devices using the GMAC, for example 
the Pinebook Pro.  Perhaps that's something to be fixed as well.

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Heiko Stübner]

Am Montag, 27. November 2023, 11:43:05 CET schrieb Dragan Simic:
> On 2023-11-27 11:29, Heiko Stübner wrote:
> > Am Montag, 27. November 2023, 10:58:43 CET schrieb Tim Lunn:
> >> On 11/27/23 20:45, Heiko Stübner wrote:
> >>> It's different for mmc, where this naming scheme isn't normally used,
> >>> so we (mostly?) migrated to them being in the board-specific alias 
> >>> section.
> >> 
> >> What about the ethernet alias, the MAC is part of the SoC, should this
> >> stay as it is in patch 6 from this series, or move to board dtsi?
> > 
> > I think judging from everything above (and the other modern boards
> > like all rk3588 ones) the ethernet0 alias should move to the board 
> > dts(i).
> > 
> > The gmac generally does not have this numbering scheme like i2c or 
> > uarts.
> 
> Please note there's already an Ethernet alias defined in rk3399.dtsi, 
> even despite not all RK3399-based devices using the GMAC, for example 
> the Pinebook Pro.  Perhaps that's something to be fixed as well.

possibly :-)

I guess for starters we shouldn't introduce new instances for it.

All the newer SoCs already have their ethernet alias in the board dts
(rk356x, rk3568) which came after we also moved the mmc aliases.


Heiko

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Dragan Simic]

On 2023-11-27 11:50, Heiko Stübner wrote:
> Am Montag, 27. November 2023, 11:43:05 CET schrieb Dragan Simic:
>> On 2023-11-27 11:29, Heiko Stübner wrote:
>> > Am Montag, 27. November 2023, 10:58:43 CET schrieb Tim Lunn:
>> >> On 11/27/23 20:45, Heiko Stübner wrote:
>> >>> It's different for mmc, where this naming scheme isn't normally used,
>> >>> so we (mostly?) migrated to them being in the board-specific alias
>> >>> section.
>> >>
>> >> What about the ethernet alias, the MAC is part of the SoC, should this
>> >> stay as it is in patch 6 from this series, or move to board dtsi?
>> >
>> > I think judging from everything above (and the other modern boards
>> > like all rk3588 ones) the ethernet0 alias should move to the board
>> > dts(i).
>> >
>> > The gmac generally does not have this numbering scheme like i2c or
>> > uarts.
>> 
>> Please note there's already an Ethernet alias defined in rk3399.dtsi,
>> even despite not all RK3399-based devices using the GMAC, for example
>> the Pinebook Pro.  Perhaps that's something to be fixed as well.
> 
> possibly :-)
> 
> I guess for starters we shouldn't introduce new instances for it.

Totally agreed.

> All the newer SoCs already have their ethernet alias in the board dts
> (rk356x, rk3568) which came after we also moved the mmc aliases.

The base rk3399.dtsi file and the RK3399-based board/device dts(i) files 
are fine when it comes to the mmc aliases.  I can move forward and clean 
up the Ethernet alias as well, if you agree?

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Heiko Stübner]

Am Montag, 27. November 2023, 11:55:21 CET schrieb Dragan Simic:
> On 2023-11-27 11:50, Heiko Stübner wrote:
> > Am Montag, 27. November 2023, 11:43:05 CET schrieb Dragan Simic:
> >> On 2023-11-27 11:29, Heiko Stübner wrote:
> >> > Am Montag, 27. November 2023, 10:58:43 CET schrieb Tim Lunn:
> >> >> On 11/27/23 20:45, Heiko Stübner wrote:
> >> >>> It's different for mmc, where this naming scheme isn't normally used,
> >> >>> so we (mostly?) migrated to them being in the board-specific alias
> >> >>> section.
> >> >>
> >> >> What about the ethernet alias, the MAC is part of the SoC, should this
> >> >> stay as it is in patch 6 from this series, or move to board dtsi?
> >> >
> >> > I think judging from everything above (and the other modern boards
> >> > like all rk3588 ones) the ethernet0 alias should move to the board
> >> > dts(i).
> >> >
> >> > The gmac generally does not have this numbering scheme like i2c or
> >> > uarts.
> >> 
> >> Please note there's already an Ethernet alias defined in rk3399.dtsi,
> >> even despite not all RK3399-based devices using the GMAC, for example
> >> the Pinebook Pro.  Perhaps that's something to be fixed as well.
> > 
> > possibly :-)
> > 
> > I guess for starters we shouldn't introduce new instances for it.
> 
> Totally agreed.
> 
> > All the newer SoCs already have their ethernet alias in the board dts
> > (rk356x, rk3568) which came after we also moved the mmc aliases.
> 
> The base rk3399.dtsi file and the RK3399-based board/device dts(i) files 
> are fine when it comes to the mmc aliases.  I can move forward and clean 
> up the Ethernet alias as well, if you agree?

Yep, we moved mmc aliases a while ago.

So moving the ethernet sounds like the right way forward. So if you have
the time for it, then I'd be quite happy to take patches for that change.


Thanks
Heiko

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Dragan Simic]

On 2023-11-27 12:10, Heiko Stübner wrote:
> Am Montag, 27. November 2023, 11:55:21 CET schrieb Dragan Simic:
>> On 2023-11-27 11:50, Heiko Stübner wrote:
>> > Am Montag, 27. November 2023, 11:43:05 CET schrieb Dragan Simic:
>> >> On 2023-11-27 11:29, Heiko Stübner wrote:
>> >> > Am Montag, 27. November 2023, 10:58:43 CET schrieb Tim Lunn:
>> >> >> On 11/27/23 20:45, Heiko Stübner wrote:
>> >> >>> It's different for mmc, where this naming scheme isn't normally used,
>> >> >>> so we (mostly?) migrated to them being in the board-specific alias
>> >> >>> section.
>> >> >>
>> >> >> What about the ethernet alias, the MAC is part of the SoC, should this
>> >> >> stay as it is in patch 6 from this series, or move to board dtsi?
>> >> >
>> >> > I think judging from everything above (and the other modern boards
>> >> > like all rk3588 ones) the ethernet0 alias should move to the board
>> >> > dts(i).
>> >> >
>> >> > The gmac generally does not have this numbering scheme like i2c or
>> >> > uarts.
>> >>
>> >> Please note there's already an Ethernet alias defined in rk3399.dtsi,
>> >> even despite not all RK3399-based devices using the GMAC, for example
>> >> the Pinebook Pro.  Perhaps that's something to be fixed as well.
>> >
>> > possibly :-)
>> >
>> > I guess for starters we shouldn't introduce new instances for it.
>> 
>> Totally agreed.
>> 
>> > All the newer SoCs already have their ethernet alias in the board dts
>> > (rk356x, rk3568) which came after we also moved the mmc aliases.
>> 
>> The base rk3399.dtsi file and the RK3399-based board/device dts(i) 
>> files
>> are fine when it comes to the mmc aliases.  I can move forward and 
>> clean
>> up the Ethernet alias as well, if you agree?
> 
> Yep, we moved mmc aliases a while ago.
> 
> So moving the ethernet sounds like the right way forward. So if you 
> have
> the time for it, then I'd be quite happy to take patches for that 
> change.

Great, thanks.  I'll prepare the patches in the next couple of days, and 
send them over.

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Dragan Simic]

On 2023-11-27 14:07, Dragan Simic wrote:
> On 2023-11-27 12:10, Heiko Stübner wrote:
>> Am Montag, 27. November 2023, 11:55:21 CET schrieb Dragan Simic:
>>> On 2023-11-27 11:50, Heiko Stübner wrote:
>>>> Am Montag, 27. November 2023, 11:43:05 CET schrieb Dragan Simic:
>>>>> Please note there's already an Ethernet alias defined in 
>>>>> rk3399.dtsi,
>>>>> even despite not all RK3399-based devices using the GMAC, for 
>>>>> example
>>>>> the Pinebook Pro.  Perhaps that's something to be fixed as well.
>>>> 
>>>> possibly :-)
>>>> 
>>>> I guess for starters we shouldn't introduce new instances for it.
>>> 
>>> Totally agreed.
>>> 
>>> > All the newer SoCs already have their ethernet alias in the board dts
>>> > (rk356x, rk3568) which came after we also moved the mmc aliases.
>>> 
>>> The base rk3399.dtsi file and the RK3399-based board/device dts(i) 
>>> files
>>> are fine when it comes to the mmc aliases.  I can move forward and 
>>> clean
>>> up the Ethernet alias as well, if you agree?
>> 
>> Yep, we moved mmc aliases a while ago.
>> 
>> So moving the ethernet sounds like the right way forward. So if you 
>> have
>> the time for it, then I'd be quite happy to take patches for that 
>> change.
> 
> Great, thanks.  I'll prepare the patches in the next couple of days,
> and send them over.

I apologize for the delay, I finally got around to implementing and 
verifying these patches for the RK3399, RK3368, RK3328 and PX30 SoC 
dts(i) files. [1]  The way I verified them was to compare the compiled 
dtb files before and after applying the patches.

Also, I went ahead and implemented the patches that add ethernet aliases 
to the RK356x and RK3588 dts board files. [2]  With these patches in 
place, together with the other patches that have already been accepted, 
we should have a rather clean situation when it comes to the Rockchip 
arm64 DT aliases.

[1] 
https://lore.kernel.org/linux-rockchip/cover.1702366958.git.dsimic@manjaro.org/T/#u
[2] 
https://lore.kernel.org/linux-rockchip/cover.1702368023.git.dsimic@manjaro.org/T/#u

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Tim Lunn]

Hi Heiko,

On 11/27/23 21:29, Heiko Stübner wrote:
> Am Montag, 27. November 2023, 10:58:43 CET schrieb Tim Lunn:
>> On 11/27/23 20:45, Heiko Stübner wrote:
>>> Am Montag, 27. November 2023, 10:27:41 CET schrieb Krzysztof Kozlowski:
>>>> On 27/11/2023 10:23, Tim Lunn wrote:
>>>>> Hi
>>>>>
>>>>> On 11/27/23 17:52, Krzysztof Kozlowski wrote:
>>>>>> On 27/11/2023 00:06, Heiko Stübner wrote:
>>>>>>> Hi Krzysztof,
>>>>>>>
>>>>>>> Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
>>>>>>>> On 22/11/2023 13:22, Tim Lunn wrote:
>>>>>>>>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
>>>>>>>>>
>>>>>>>>> Signed-off-by: Tim Lunn <tim@feathertop.org>
>>>>>>>>> ---
>>>>>>>>>
>>>>>>>>> (no changes since v1)
>>>>>>>>>
>>>>>>>>>     arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
>>>>>>>>>     arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
>>>>>>>>>     2 files changed, 25 insertions(+)
>>>>>>>>>
>>>>>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>>>>>> index 4f85b7b3fc4c..167a48afa3a4 100644
>>>>>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>>>>>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
>>>>>>>>>     				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
>>>>>>>>>     		};
>>>>>>>>>     	};
>>>>>>>>> +	i2c2 {
>>>>>>>>> +		/omit-if-no-ref/
>>>>>>>>> +		i2c2_xfer: i2c2-xfer {
>>>>>>>>> +			rockchip,pins =
>>>>>>>>> +				/* i2c2_scl */
>>>>>>>>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
>>>>>>>>> +				/* i2c2_sda */
>>>>>>>>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
>>>>>>>>> +		};
>>>>>>>>> +	};
>>>>>>>>>     	pwm2 {
>>>>>>>>>     		/omit-if-no-ref/
>>>>>>>>>     		pwm2m0_pins: pwm2m0-pins {
>>>>>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>>>>>> index 6c5c928f06c7..cf1df75df418 100644
>>>>>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>>>>>> @@ -21,6 +21,7 @@ / {
>>>>>>>>>     
>>>>>>>>>     	aliases {
>>>>>>>>>     		i2c0 = &i2c0;
>>>>>>>>> +		i2c2 = &i2c2;
>>>>>>>> No, this should be per-board to match board labeling/schematics.
>>>>>>> At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
>>>>>>> and also all board schematics I've seen so far are very consistent for
>>>>>>> these ... i2c2 for example is labled i2c2 both in the pins in the socs
>>>>>>> and also in the board-schematics using them.
>>>>>>>
>>>>>>> So while I can agree that things like mmc-aliases might be board-specific,
>>>>>>> I do think aliases for the core busses should be able to live in the soc dtsi
>>>>>>> as for all Rockchip SoCs so far?
>>>>>> If you do not list here all aliases, it is already board-specific, isn't it?
>>>>>>
>>>>>> https://lore.kernel.org/linux-rockchip/CAK8P3a25iYksubCnQb1-e5yj=crEsK37RB9Hn4ZGZMwcVVrG7g@mail.gmail.com/
>>>>> I had only added aliases for nodes that are implemented. RV1126 has 6
>>>>> i2c busses but so far not all these exist in the soc.dtsi.
>>>>>
>>>> OK, that would explain why you have only two. Anyway, it is just generic
>>>> guideline, so up to Heiko what to do with it.
>>> People see "uart2-tx" on their pin-header description and then of course
>>> want to use ttyS2 ... same with reading i2c2-sda on the pin-header and then
>>> running i2cdetect on said i2c2 dev node.
>>>
>>> And even if i2c1 is not populated (would even be very rare), then people
>>> would still expect i2c2 to be named that way.
>>>
>>> As this is the same for _every_ board, it doesn't really make sense to
>>> duplicate it every time. Which I guess is similar to what I wrote in reply
>>> to the mail you linked above :-) .
>> So I will leave the i2c and serial aliases as they are in rv1126.dtsi then?
> correct
>
>
>>> It's different for mmc, where this naming scheme isn't normally used,
>>> so we (mostly?) migrated to them being in the board-specific alias section.
>> What about the ethernet alias,   the MAC is part of the SoC, should this
>> stay as it is
>> in patch 6 from this series, or move to board dtsi?
> I think judging from everything above (and the other modern boards
> like all rk3588 ones) the ethernet0 alias should move to the board dts(i).
>
> The gmac generally does not have this numbering scheme like i2c or uarts.
Noted, I will prepare these changes in a v3 series

Regards
    Tim.

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Alex Bee]

Hi Heiko,
Am 27.11.23 um 10:45 schrieb Heiko Stübner:
> Am Montag, 27. November 2023, 10:27:41 CET schrieb Krzysztof Kozlowski:
>> On 27/11/2023 10:23, Tim Lunn wrote:
>>> Hi
>>>
>>> On 11/27/23 17:52, Krzysztof Kozlowski wrote:
>>>> On 27/11/2023 00:06, Heiko Stübner wrote:
>>>>> Hi Krzysztof,
>>>>>
>>>>> Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
>>>>>> On 22/11/2023 13:22, Tim Lunn wrote:
>>>>>>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
>>>>>>>
>>>>>>> Signed-off-by: Tim Lunn <tim@feathertop.org>
>>>>>>> ---
>>>>>>>
>>>>>>> (no changes since v1)
>>>>>>>
>>>>>>>    arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
>>>>>>>    arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
>>>>>>>    2 files changed, 25 insertions(+)
>>>>>>>
>>>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>>>> index 4f85b7b3fc4c..167a48afa3a4 100644
>>>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
>>>>>>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
>>>>>>>    				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
>>>>>>>    		};
>>>>>>>    	};
>>>>>>> +	i2c2 {
>>>>>>> +		/omit-if-no-ref/
>>>>>>> +		i2c2_xfer: i2c2-xfer {
>>>>>>> +			rockchip,pins =
>>>>>>> +				/* i2c2_scl */
>>>>>>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
>>>>>>> +				/* i2c2_sda */
>>>>>>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
>>>>>>> +		};
>>>>>>> +	};
>>>>>>>    	pwm2 {
>>>>>>>    		/omit-if-no-ref/
>>>>>>>    		pwm2m0_pins: pwm2m0-pins {
>>>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>>>> index 6c5c928f06c7..cf1df75df418 100644
>>>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
>>>>>>> @@ -21,6 +21,7 @@ / {
>>>>>>>    
>>>>>>>    	aliases {
>>>>>>>    		i2c0 = &i2c0;
>>>>>>> +		i2c2 = &i2c2;
>>>>>> No, this should be per-board to match board labeling/schematics.
>>>>> At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
>>>>> and also all board schematics I've seen so far are very consistent for
>>>>> these ... i2c2 for example is labled i2c2 both in the pins in the socs
>>>>> and also in the board-schematics using them.
>>>>>
>>>>> So while I can agree that things like mmc-aliases might be board-specific,
>>>>> I do think aliases for the core busses should be able to live in the soc dtsi
>>>>> as for all Rockchip SoCs so far?
>>>> If you do not list here all aliases, it is already board-specific, isn't it?
>>>>
>>>> https://lore.kernel.org/linux-rockchip/CAK8P3a25iYksubCnQb1-e5yj=crEsK37RB9Hn4ZGZMwcVVrG7g@mail.gmail.com/
>>> I had only added aliases for nodes that are implemented. RV1126 has 6
>>> i2c busses but so far not all these exist in the soc.dtsi.
>>>
>>
>> OK, that would explain why you have only two. Anyway, it is just generic
>> guideline, so up to Heiko what to do with it.
> 
> People see "uart2-tx" on their pin-header description and then of course
> want to use ttyS2 ... same with reading i2c2-sda on the pin-header and then
> running i2cdetect on said i2c2 dev node.
> 
If that's "the" rule, why was rk3128.dtsi merged after similar 
complaints came up [0] without having aliases for the core buses 
defined? It's pretty strange to have to define them on board-level there 
as well.
I'm happy to submit a patch which changes that.

[0] https://lore.kernel.org/all/22076018.EfDdHjke4D@diego/

Regards,
Alex
> And even if i2c1 is not populated (would even be very rare), then people
> would still expect i2c2 to be named that way.
> 
> As this is the same for _every_ board, it doesn't really make sense to
> duplicate it every time. Which I guess is similar to what I wrote in reply
> to the mail you linked above :-) .
> 
> 
> It's different for mmc, where this naming scheme isn't normally used,
> so we (mostly?) migrated to them being in the board-specific alias section.
> 
> Thanks
> Heiko
> 
> 
> 
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip

Re: [PATCH v2 4/9] ARM: dts: rockchip: rv1126: Add i2c2 nodes

[Heiko Stübner]

Hi Alex,

Am Dienstag, 28. November 2023, 00:11:37 CET schrieb Alex Bee:
> Hi Heiko,
> Am 27.11.23 um 10:45 schrieb Heiko Stübner:
> > Am Montag, 27. November 2023, 10:27:41 CET schrieb Krzysztof Kozlowski:
> >> On 27/11/2023 10:23, Tim Lunn wrote:
> >>> Hi
> >>>
> >>> On 11/27/23 17:52, Krzysztof Kozlowski wrote:
> >>>> On 27/11/2023 00:06, Heiko Stübner wrote:
> >>>>> Hi Krzysztof,
> >>>>>
> >>>>> Am Mittwoch, 22. November 2023, 13:29:47 CET schrieb Krzysztof Kozlowski:
> >>>>>> On 22/11/2023 13:22, Tim Lunn wrote:
> >>>>>>> Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126
> >>>>>>>
> >>>>>>> Signed-off-by: Tim Lunn <tim@feathertop.org>
> >>>>>>> ---
> >>>>>>>
> >>>>>>> (no changes since v1)
> >>>>>>>
> >>>>>>>    arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 10 ++++++++++
> >>>>>>>    arch/arm/boot/dts/rockchip/rv1126.dtsi         | 15 +++++++++++++++
> >>>>>>>    2 files changed, 25 insertions(+)
> >>>>>>>
> >>>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> >>>>>>> index 4f85b7b3fc4c..167a48afa3a4 100644
> >>>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> >>>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
> >>>>>>> @@ -87,6 +87,16 @@ i2c0_xfer: i2c0-xfer {
> >>>>>>>    				<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
> >>>>>>>    		};
> >>>>>>>    	};
> >>>>>>> +	i2c2 {
> >>>>>>> +		/omit-if-no-ref/
> >>>>>>> +		i2c2_xfer: i2c2-xfer {
> >>>>>>> +			rockchip,pins =
> >>>>>>> +				/* i2c2_scl */
> >>>>>>> +				<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
> >>>>>>> +				/* i2c2_sda */
> >>>>>>> +				<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
> >>>>>>> +		};
> >>>>>>> +	};
> >>>>>>>    	pwm2 {
> >>>>>>>    		/omit-if-no-ref/
> >>>>>>>    		pwm2m0_pins: pwm2m0-pins {
> >>>>>>> diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
> >>>>>>> index 6c5c928f06c7..cf1df75df418 100644
> >>>>>>> --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
> >>>>>>> +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
> >>>>>>> @@ -21,6 +21,7 @@ / {
> >>>>>>>    
> >>>>>>>    	aliases {
> >>>>>>>    		i2c0 = &i2c0;
> >>>>>>> +		i2c2 = &i2c2;
> >>>>>> No, this should be per-board to match board labeling/schematics.
> >>>>> At least for i2c, uarts and i.e. spi ... Rockchip manuals, pin namings
> >>>>> and also all board schematics I've seen so far are very consistent for
> >>>>> these ... i2c2 for example is labled i2c2 both in the pins in the socs
> >>>>> and also in the board-schematics using them.
> >>>>>
> >>>>> So while I can agree that things like mmc-aliases might be board-specific,
> >>>>> I do think aliases for the core busses should be able to live in the soc dtsi
> >>>>> as for all Rockchip SoCs so far?
> >>>> If you do not list here all aliases, it is already board-specific, isn't it?
> >>>>
> >>>> https://lore.kernel.org/linux-rockchip/CAK8P3a25iYksubCnQb1-e5yj=crEsK37RB9Hn4ZGZMwcVVrG7g@mail.gmail.com/
> >>> I had only added aliases for nodes that are implemented. RV1126 has 6
> >>> i2c busses but so far not all these exist in the soc.dtsi.
> >>>
> >>
> >> OK, that would explain why you have only two. Anyway, it is just generic
> >> guideline, so up to Heiko what to do with it.
> > 
> > People see "uart2-tx" on their pin-header description and then of course
> > want to use ttyS2 ... same with reading i2c2-sda on the pin-header and then
> > running i2cdetect on said i2c2 dev node.
> > 
> If that's "the" rule, why was rk3128.dtsi merged after similar 
> complaints came up [0] without having aliases for the core buses 
> defined?

probably because it slipped through or so. At least in my argument in
the mail you linked I'm consistent to here ;-)

> It's pretty strange to have to define them on board-level there 
> as well.
>
> I'm happy to submit a patch which changes that.

Yep and rk3128 really is the only outlier there, so sure, go ahead
with moving the core ones.


Heiko

> [0] https://lore.kernel.org/all/22076018.EfDdHjke4D@diego/

[PATCH v2 5/9] ARM: dts: rockchip: rv1126: Split up rgmii1 pinctrl

[Tim Lunn]

Split up the pinctrl definitions for rgmii1 so it can be shared
with devices using an RMII PHY.

Signed-off-by: Tim Lunn <tim@feathertop.org>
---

(no changes since v1)

 .../dts/rockchip/rv1126-edgeble-neu2-io.dts   |  2 +-
 .../arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 46 +++++++++++++------
 2 files changed, 34 insertions(+), 14 deletions(-)

diff --git a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts
index f09be8405964..0c2396b8f8db 100644
--- a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts
+++ b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts
@@ -61,7 +61,7 @@ &gmac {
 	phy-mode = "rgmii";
 	phy-supply = <&vcc_3v3>;
 	pinctrl-names = "default";
-	pinctrl-0 = <&rgmiim1_pins &clk_out_ethernetm1_pins>;
+	pinctrl-0 = <&rgmiim1_miim &rgmiim1_bus2 &rgmiim1_bus4 &clk_out_ethernetm1_pins>;
 	tx_delay = <0x2a>;
 	rx_delay = <0x1a>;
 	status = "okay";
diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
index 167a48afa3a4..06b1d7f2d858 100644
--- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
@@ -115,36 +115,56 @@ pwm11m0_pins: pwm11m0-pins {
 	};
 	rgmii {
 		/omit-if-no-ref/
-		rgmiim1_pins: rgmiim1-pins {
+		rgmiim1_miim: rgmiim1-miim {
 			rockchip,pins =
 				/* rgmii_mdc_m1 */
 				<2 RK_PC2 2 &pcfg_pull_none>,
 				/* rgmii_mdio_m1 */
-				<2 RK_PC1 2 &pcfg_pull_none>,
-				/* rgmii_rxclk_m1 */
-				<2 RK_PD3 2 &pcfg_pull_none>,
+				<2 RK_PC1 2 &pcfg_pull_none>;
+		};
+		/omit-if-no-ref/
+		rgmiim1_rxer: rgmiim1-rxer {
+			rockchip,pins =
+				/* rgmii_rxer_m1 */
+				<2 RK_PC0 2 &pcfg_pull_none>;
+		};
+		/omit-if-no-ref/
+		rgmiim1_bus2: rgmiim1-bus2 {
+			rockchip,pins =
 				/* rgmii_rxd0_m1 */
 				<2 RK_PB5 2 &pcfg_pull_none>,
 				/* rgmii_rxd1_m1 */
 				<2 RK_PB6 2 &pcfg_pull_none>,
-				/* rgmii_rxd2_m1 */
-				<2 RK_PC7 2 &pcfg_pull_none>,
-				/* rgmii_rxd3_m1 */
-				<2 RK_PD0 2 &pcfg_pull_none>,
 				/* rgmii_rxdv_m1 */
 				<2 RK_PB4 2 &pcfg_pull_none>,
-				/* rgmii_txclk_m1 */
-				<2 RK_PD2 2 &pcfg_pull_none_drv_level_3>,
 				/* rgmii_txd0_m1 */
 				<2 RK_PC3 2 &pcfg_pull_none_drv_level_3>,
 				/* rgmii_txd1_m1 */
 				<2 RK_PC4 2 &pcfg_pull_none_drv_level_3>,
+				/* rgmii_txen_m1 */
+				<2 RK_PC6 2 &pcfg_pull_none_drv_level_3>;
+		};
+		/omit-if-no-ref/
+		rgmiim1_bus4: rgmiim1-bus4 {
+			rockchip,pins =
+				/* rgmii_rxclk_m1 */
+				<2 RK_PD3 2 &pcfg_pull_none>,
+				/* rgmii_rxd2_m1 */
+				<2 RK_PC7 2 &pcfg_pull_none>,
+				/* rgmii_rxd3_m1 */
+				<2 RK_PD0 2 &pcfg_pull_none>,
+				/* rgmii_txclk_m1 */
+				<2 RK_PD2 2 &pcfg_pull_none_drv_level_3>,
 				/* rgmii_txd2_m1 */
 				<2 RK_PD1 2 &pcfg_pull_none_drv_level_3>,
 				/* rgmii_txd3_m1 */
-				<2 RK_PA4 2 &pcfg_pull_none_drv_level_3>,
-				/* rgmii_txen_m1 */
-				<2 RK_PC6 2 &pcfg_pull_none_drv_level_3>;
+				<2 RK_PA4 2 &pcfg_pull_none_drv_level_3>;
+		};
+		/omit-if-no-ref/
+		rgmiim1_mclkinout: rgmiim1-mclkinout {
+			rockchip,pins =
+				/* rgmii_clk_m1 */
+				<2 RK_PB7 2 &pcfg_pull_none>;
 		};
 	};
 	sdmmc0 {
-- 
2.40.1

[PATCH v2 6/9] ARM: dts: rockchip: rv1126: Add ethernet alias

[Tim Lunn]

Add alias for ethernet0 to pick up mac address from u-boot/DT

Signed-off-by: Tim Lunn <tim@feathertop.org>
---

(no changes since v1)

 arch/arm/boot/dts/rockchip/rv1126.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
index cf1df75df418..bfbd4918e745 100644
--- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
@@ -20,6 +20,7 @@ / {
 	interrupt-parent = <&gic>;
 
 	aliases {
+		ethernet0 = &gmac;
 		i2c0 = &i2c0;
 		i2c2 = &i2c2;
 		serial0 = &uart0;
-- 
2.40.1

[PATCH v2 7/9] ARM: dts: rockchip: Add rv1109 SoC

[Tim Lunn]

The Rockchip rv1109 SoC is a dual core version of the rv1126. It is
otherwise identical and shares the same device tree config.

This patch introduces a dtsi file to drop the additional cpu nodes.
Taken from Rockchip BSP kernel.

Signed-off-by: Tim Lunn <tim@feathertop.org>

---

Changes in v2:
- new patch

 arch/arm/boot/dts/rockchip/rv1109.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 arch/arm/boot/dts/rockchip/rv1109.dtsi

diff --git a/arch/arm/boot/dts/rockchip/rv1109.dtsi b/arch/arm/boot/dts/rockchip/rv1109.dtsi
new file mode 100644
index 000000000000..9cbaa08ab1b8
--- /dev/null
+++ b/arch/arm/boot/dts/rockchip/rv1109.dtsi
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1126.dtsi"
+
+/ {
+	compatible = "rockchip,rv1109";
+
+	cpus {
+		/delete-node/ cpu@f02;
+		/delete-node/ cpu@f03;
+	};
+
+	arm-pmu {
+		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>;
+	};
+};
-- 
2.40.1

[PATCH v2 8/9] ARM: dts: Add Sonoff iHost Smart Home Hub

[Tim Lunn]

Sonoff iHost is gateway device designed to provide a Smart Home Hub,
it is based on Rockchip RV1126. There is also a version with 2GB RAM
based off the RV1109 dual core SoC.

Features:
- Rockchip RV1126
- 4GB DDR4
- 8GB eMMC
- microSD slot
- RMII Ethernet PHY
- 1x USB 2.0 Host
- 1x USB 2.0 OTG
- Realtek RTL8723DS WiFi/BT
- EFR32MG21 Silabs Zigbee radio
- Speaker/Microphone

This patch adds the initial device tree for this device, it is largely
based off the device trees for mainline Edgeble Neu2 and downstream
Rockchip rv1126-evb-v13 configs. It has been adapted with relevant
peripheral and GPIO pins for the iHost.

Signed-off-by: Tim Lunn <tim@feathertop.org>

---

Changes in v2:
- Address review comments from Heiko
- Split out rv1109.dtsi to new patch

 arch/arm/boot/dts/rockchip/Makefile           |   2 +
 .../boot/dts/rockchip/rv1109-sonoff-ihost.dts |  13 +
 .../boot/dts/rockchip/rv1126-sonoff-ihost.dts |  13 +
 .../dts/rockchip/rv1126-sonoff-ihost.dtsi     | 407 ++++++++++++++++++
 4 files changed, 435 insertions(+)
 create mode 100644 arch/arm/boot/dts/rockchip/rv1109-sonoff-ihost.dts
 create mode 100644 arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dts
 create mode 100644 arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi

diff --git a/arch/arm/boot/dts/rockchip/Makefile b/arch/arm/boot/dts/rockchip/Makefile
index 0f46e18fe275..4d4533d6f407 100644
--- a/arch/arm/boot/dts/rockchip/Makefile
+++ b/arch/arm/boot/dts/rockchip/Makefile
@@ -2,7 +2,9 @@
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rv1108-elgin-r1.dtb \
 	rv1108-evb.dtb \
+	rv1109-sonoff-ihost.dtb \
 	rv1126-edgeble-neu2-io.dtb \
+	rv1126-sonoff-ihost.dtb \
 	rk3036-evb.dtb \
 	rk3036-kylin.dtb \
 	rk3066a-bqcurie2.dtb \
diff --git a/arch/arm/boot/dts/rockchip/rv1109-sonoff-ihost.dts b/arch/arm/boot/dts/rockchip/rv1109-sonoff-ihost.dts
new file mode 100644
index 000000000000..3bfdb00ac8e1
--- /dev/null
+++ b/arch/arm/boot/dts/rockchip/rv1109-sonoff-ihost.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+#include "rv1109.dtsi"
+#include "rv1126-sonoff-ihost.dtsi"
+
+/ {
+	model = "Sonoff iHost 2G";
+	compatible = "itead,sonoff-ihost", "rockchip,rv1109";
+};
diff --git a/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dts b/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dts
new file mode 100644
index 000000000000..106d1e42f285
--- /dev/null
+++ b/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+#include "rv1126.dtsi"
+#include "rv1126-sonoff-ihost.dtsi"
+
+/ {
+	model = "Sonoff iHost 4G";
+	compatible = "itead,sonoff-ihost", "rockchip,rv1126";
+};
diff --git a/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi b/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi
new file mode 100644
index 000000000000..a7e0e6772906
--- /dev/null
+++ b/arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi
@@ -0,0 +1,407 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+	};
+
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	vcc5v0_sys: regulator-vcc5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	sdio_pwrseq: pwrseq-sdio {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rk809 1>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+		reset-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&emmc {
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_rstnout>;
+	rockchip,default-sample-phase = <90>;
+	vmmc-supply = <&vcc_3v3>;
+	vqmmc-supply = <&vcc_1v8>;
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	rk809: pmic@20 {
+		compatible = "rockchip,rk809";
+		reg = <0x20>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
+		#clock-cells = <1>;
+		clock-output-names = "rk808-clkout1", "rk808-clkout2";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+
+		vcc1-supply = <&vcc5v0_sys>;
+		vcc2-supply = <&vcc5v0_sys>;
+		vcc3-supply = <&vcc5v0_sys>;
+		vcc4-supply = <&vcc5v0_sys>;
+		vcc5-supply = <&vcc_buck5>;
+		vcc6-supply = <&vcc_buck5>;
+		vcc7-supply = <&vcc5v0_sys>;
+		vcc8-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc5v0_sys>;
+
+		regulators {
+			vdd_npu_vepu: DCDC_REG1 {
+				regulator-name = "vdd_npu_vepu";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x2>;
+				regulator-min-microvolt = <650000>;
+				regulator-max-microvolt = <950000>;
+				regulator-ramp-delay = <6001>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_arm: DCDC_REG2 {
+				regulator-name = "vdd_arm";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x2>;
+				regulator-min-microvolt = <725000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x2>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc3v3_sys: DCDC_REG4 {
+				regulator-name = "vcc3v3_sys";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x2>;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_buck5: DCDC_REG5 {
+				regulator-name = "vcc_buck5";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2200000>;
+				regulator-max-microvolt = <2200000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <2200000>;
+				};
+			};
+
+			vcc_0v8: LDO_REG1 {
+				regulator-name = "vcc_0v8";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <800000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc1v8_pmu: LDO_REG2 {
+				regulator-name = "vcc1v8_pmu";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd0v8_pmu: LDO_REG3 {
+				regulator-name = "vcc0v8_pmu";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <800000>;
+				};
+			};
+
+			vcc_1v8: LDO_REG4 {
+				regulator-name = "vcc_1v8";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_dovdd: LDO_REG5 {
+				regulator-name = "vcc_dovdd";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_dvdd: LDO_REG6 {
+				regulator-name = "vcc_dvdd";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_avdd: LDO_REG7 {
+				regulator-name = "vcc_avdd";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vccio_sd: LDO_REG8 {
+				regulator-name = "vccio_sd";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v3_sd: LDO_REG9 {
+				regulator-name = "vcc3v3_sd";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_5v0: SWITCH_REG1 {
+				regulator-name = "vcc_5v0";
+			};
+
+			vcc_3v3: SWITCH_REG2 {
+				regulator-name = "vcc_3v3";
+				regulator-always-on;
+				regulator-boot-on;
+			};
+		};
+	};
+};
+
+&i2c2 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	pcf8563: rtc@51 {
+		compatible = "nxp,pcf8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
+		clock-output-names = "xin32k";
+	};
+};
+
+&gmac {
+	assigned-clocks = <&cru CLK_GMAC_SRC_M1>, <&cru CLK_GMAC_SRC>,
+			  <&cru CLK_GMAC_TX_RX>;
+	assigned-clock-parents = <&cru CLK_GMAC_RGMII_M1>, <&cru CLK_GMAC_SRC_M1>,
+				 <&cru RMII_MODE_CLK>;
+	assigned-clock-rates = <0>, <50000000>;
+	clock_in_out = "output";
+	phy-handle = <&phy>;
+	phy-mode = "rmii";
+	phy-supply = <&vcc_3v3>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmiim1_miim &rgmiim1_rxer &rgmiim1_bus2 &rgmiim1_mclkinout>;
+	status = "okay";
+};
+
+&mdio {
+	phy: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&eth_phy_rst>;
+		reset-active-low;
+		reset-assert-us = <50000>;
+		reset-deassert-us = <10000>;
+		reset-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&pinctrl {
+	ethernet {
+		eth_phy_rst: eth-phy-rst {
+			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+	bt {
+		bt_enable: bt-enable {
+			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		bt_wake_dev: bt-wake-dev {
+			rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		bt_wake_host: bt-wake-host {
+			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	wifi {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pmu_io_domains {
+	pmuio0-supply = <&vcc1v8_pmu>;
+	pmuio1-supply = <&vcc3v3_sys>;
+	vccio1-supply = <&vcc_1v8>;
+	vccio2-supply = <&vccio_sd>;
+	vccio3-supply = <&vcc_1v8>;
+	vccio4-supply = <&vcc_dovdd>;
+	vccio5-supply = <&vcc_1v8>;
+	vccio6-supply = <&vcc_1v8>;
+	vccio7-supply = <&vcc_dovdd>;
+	status = "okay";
+};
+
+&saradc {
+	vref-supply = <&vcc_1v8>;
+	status = "okay";
+};
+
+&sdio {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+	max-frequency = <100000000>;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>;
+	rockchip,default-sample-phase = <90>;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vcc3v3_sys>;
+	vqmmc-supply = <&vcc_1v8>;
+	status = "okay";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	card-detect-delay = <200>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>;
+	rockchip,default-sample-phase = <90>;
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr104;
+	vqmmc-supply = <&vccio_sd>;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer &uart0_ctsn &uart0_rtsn>;
+	uart-has-rtscts;
+	status = "okay";
+
+	bluetooth {
+		compatible = "realtek,rtl8723ds-bt";
+		device-wake-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; /* BT_WAKE */
+		enable-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; /* BT_RST */
+		host-wake-gpios = <&gpio1 RK_PC5 GPIO_ACTIVE_HIGH>; /* BT_WAKE_HOST */
+		max-speed = <2000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_enable>, <&bt_wake_dev>, <&bt_wake_host>;
+	};
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3m2_xfer>;
+	status = "okay";
+};
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart4m2_xfer>;
+	status = "okay";
+};
-- 
2.40.1

[PATCH v2 9/9] dt-bindings: arm: rockchip: Add Sonoff iHost

[Tim Lunn]

Sonoff iHost is a smart home hub with built in radios for wifi/bt
and Zigbee. It is based off the Rockchip RV1126 (or RV1109) SoC.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Acked-by: Rob Herring <robh@kernel.org>

---

Changes in v2:
- Collect Robh Ack for dt-bindings patch

 Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 5f7c6c4aad8f..a26bbcd00deb 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -922,6 +922,13 @@ properties:
           - const: rockchip,rk3568-bpi-r2pro
           - const: rockchip,rk3568
 
+      - description: Sonoff iHost Smart Home Hub
+        items:
+          - const: itead,sonoff-ihost
+          - enum:
+              - rockchip,rv1126
+              - rockchip,rv1109
+
 additionalProperties: true
 
 ...
-- 
2.40.1