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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Thierry Reding <thierry.reding@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: Jon Hunter <jonathanh@nvidia.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Amit Kucheria <amitk@kernel.org>, Zhang Rui <rui.zhang@intel.com>,
	devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-tegra@vger.kernel.org
Subject: Re: [PATCH] dt-bindings: thermal: tegra: Convert to json-schema
Date: Mon, 10 Jul 2023 10:09:18 +0200	[thread overview]
Message-ID: <d6386a66-4cc2-9358-e65e-b09e614800c3@linaro.org> (raw)
In-Reply-To: <20230707133333.2998802-1-thierry.reding@gmail.com>

On 07/07/2023 15:33, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> Convert the Tegra thermal bindings from the free-form text format to
> json-schema.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>

Thank you for your patch. There is something to discuss/improve.

...

> +properties:
> +  compatible:
> +    enum:
> +      - nvidia,tegra124-soctherm
> +      - nvidia,tegra132-soctherm
> +      - nvidia,tegra210-soctherm
> +
> +  reg:
> +    minItems: 2

Drop minItems, not needed if equals to maxItems.

> +    maxItems: 2
> +
> +  reg-names:
> +    minItems: 2

Drop minItems, not needed if equals to maxItems.


> +    maxItems: 2
> +
> +  interrupts:
> +    items:
> +      - description: module interrupt
> +      - description: EDP interrupt
> +
> +  interrupt-names:
> +    items:
> +      - const: thermal
> +      - const: edp
> +
> +  clocks:
> +    items:
> +      - description: thermal sensor clock
> +      - description: module clock
> +
> +  clock-names:
> +    items:
> +      - const: tsensor
> +      - const: soctherm
> +
> +  resets:
> +    items:
> +      - description: module reset
> +
> +  reset-names:
> +    items:
> +      - const: soctherm
> +
> +  "#thermal-sensor-cells":
> +    const: 1
> +
> +  throttle-cfgs:
> +    $ref: thermal-cooling-devices.yaml

Missing unevaluatedProperties: false on this level.

> +    description: A sub-node which is a container of configuration for each
> +      hardware throttle events. These events can be set as cooling devices.
> +      Throttle event sub-nodes must be named as "light" or "heavy".
> +    patternProperties:
> +      "^(light|heavy)$":
> +        type: object
> +        properties:
> +          nvidia,priority:
> +            $ref: /schemas/types.yaml#/definitions/uint32
> +            minimum: 1
> +            maximum: 100
> +            description: Each throttles has its own throttle settings, so the
> +              SW need to set priorities for various throttle, the HW arbiter
> +              can select the final throttle settings. Bigger value indicates
> +              higher priority, In general, higher priority translates to lower
> +              target frequency. SW needs to ensure that critical thermal
> +              alarms are given higher priority, and ensure that there is no
> +              race if priority of two vectors is set to the same value.
> +
> +          nvidia,cpu-throt-percent:

Missing type

> +            description: This property is for Tegra124 and Tegra210. It is the
> +              throttling depth of pulse skippers, it's the percentage
> +              throttling.
> +
> +          nvidia,cpu-throt-level:
> +            $ref: /schemas/types.yaml#/definitions/uint32
> +            description: This property is only for Tegra132, it is the level
> +              of pulse skippers, which used to throttle clock frequencies. It
> +              indicates cpu clock throttling depth, and the depth can be
> +              programmed.
> +            enum:
> +              # none (TEGRA_SOCTHERM_THROT_LEVEL_NONE)
> +              - 0
> +              # low (TEGRA_SOCTHERM_THROT_LEVEL_LOW)
> +              - 1
> +              # medium (TEGRA_SOCTHERM_THROT_LEVEL_MED)
> +              - 2
> +              # high (TEGRA_SOCTHERM_THROT_LEVEL_HIGH)
> +              - 3
> +
> +          nvidia,gpu-throt-level:
> +            $ref: /schemas/types.yaml#/definitions/uint32
> +            description: This property is for Tegra124 and Tegra210. It is the
> +              level of pulse skippers, which used to throttle clock
> +              frequencies. It indicates gpu clock throttling depth and can be
> +              programmed to any of the following values which represent a
> +              throttling percentage.
> +            enum:
> +              # none (0%, TEGRA_SOCTHERM_THROT_LEVEL_NONE)
> +              - 0
> +              # low (50%, TEGRA_SOCTHERM_THROT_LEVEL_LOW)
> +              - 1
> +              # medium (75%, TEGRA_SOCTHERM_THROT_LEVEL_MED)
> +              - 2
> +              # high (85%, TEGRA_SOCTHERM_THROT_LEVEL_HIGH)
> +              - 3
> +
> +          # optional
> +          # Tegra210 specific and valid only for OCx throttle events
> +          nvidia,count-threshold:
> +            $ref: /schemas/types.yaml#/definitions/uint32
> +            description: Specifies the number of OC events that are required
> +              for triggering an interrupt. Interrupts are not triggered if the
> +              property is missing. A value of 0 will interrupt on every OC
> +              alarm.
> +
> +          nvidia,polarity-active-low:
> +            $ref: /schemas/types.yaml#/definitions/flag
> +            description: Configures the polarity of the OC alaram signal. If
> +              present, this means assert low, otherwise assert high.
> +
> +          nvidia,alarm-filter:
> +            $ref: /schemas/types.yaml#/definitions/uint32
> +            description: Number of clocks to filter event. When the filter
> +              expires (which means the OC event has not occurred for a long
> +              time), the counter is cleared and filter is rearmed.
> +            default: 0
> +
> +          nvidia,throttle-period-us:
> +            description: Specifies the number of microseconds for which
> +              throttling is engaged after the OC event is deasserted.
> +            default: 0
> +
> +  # optional
> +  nvidia,thermtrips:
> +    $ref: /schemas/types.yaml#/definitions/uint32-matrix

Missing items describing the matrix.

> +    description: |
> +      When present, this property specifies the temperature at which the
> +      SOCTHERM hardware will assert the thermal trigger signal to the Power
> +      Management IC, which can be configured to reset or shutdown the device.
> +      It is an array of pairs where each pair represents a tsensor ID followed
> +      by a temperature in milli Celcius. In the absence of this property the
> +      critical trip point will be used for thermtrip temperature.
> +
> +      Note:
> +      - the "critical" type trip points will be used to set the temperature at
> +        which the SOCTHERM hardware will assert a thermal trigger if the
> +        "nvidia,thermtrips" property is missing.  When the thermtrips property
> +        is present, the breach of a critical trip point is reported back to
> +        the thermal framework to implement software shutdown.
> +
> +      - the "hot" type trip points will be set to SOCTHERM hardware as the
> +        throttle temperature.  Once the temperature of this thermal zone is
> +        higher than it, it will trigger the HW throttle event.
> +


Best regards,
Krzysztof


  reply	other threads:[~2023-07-10  8:09 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-07 13:33 [PATCH] dt-bindings: thermal: tegra: Convert to json-schema Thierry Reding
2023-07-10  8:09 ` Krzysztof Kozlowski [this message]
2023-07-10 14:34   ` Thierry Reding
2023-07-10 14:46     ` Rob Herring
2023-07-10 15:13     ` Krzysztof Kozlowski

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