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[91.159.24.186]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-58316ff552esm4006185e87.127.2025.09.29.02.03.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Sep 2025 02:03:09 -0700 (PDT) Message-ID: Date: Mon, 29 Sep 2025 12:03:08 +0300 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/3] arm64: dts: qcom: qrb2210-rb1: Add overlay for vision mezzanine To: Loic Poulain , andersson@kernel.org, konradybcio@kernel.org, dave.stevenson@raspberrypi.com, sakari.ailus@linux.intel.com Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org, mchehab@kernel.org, conor+dt@kernel.org, robh@kernel.org References: <20250926073421.17408-1-loic.poulain@oss.qualcomm.com> <20250926073421.17408-4-loic.poulain@oss.qualcomm.com> From: Vladimir Zapolskiy In-Reply-To: <20250926073421.17408-4-loic.poulain@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 9/26/25 10:34, Loic Poulain wrote: > This initial version includes support for OV9282 camera sensor. > > Signed-off-by: Loic Poulain > --- > arch/arm64/boot/dts/qcom/Makefile | 5 ++ > .../qcom/qrb2210-rb1-vision-mezzanine.dtso | 76 +++++++++++++++++++ > 2 files changed, 81 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/qrb2210-rb1-vision-mezzanine.dtso > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index d7f22476d510..bee021efc249 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -138,6 +138,11 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > dtb-$(CONFIG_ARCH_QCOM) += qrb2210-rb1.dtb > + > +qrb2210-rb1-vision-mezzanine-dtbs := qrb2210-rb1.dtb qrb2210-rb1-vision-mezzanine.dtbo > + > +dtb-$(CONFIG_ARCH_QCOM) += qrb2210-rb1-vision-mezzanine.dtb > + > dtb-$(CONFIG_ARCH_QCOM) += qrb4210-rb2.dtb > dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb > > diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1-vision-mezzanine.dtso b/arch/arm64/boot/dts/qcom/qrb2210-rb1-vision-mezzanine.dtso > new file mode 100644 > index 000000000000..3b6261131b75 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1-vision-mezzanine.dtso > @@ -0,0 +1,76 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. Year is missing, please set it. > + */ > + > +/dts-v1/; > +/plugin/; > + > +#include > +#include > + > +&tlmm { > + cam0a_default: cam0a-default-state { > + pins = "gpio28"; > + function = "cam_mclk"; > + drive-strength = <16>; > + bias-disable; > + }; > +}; This is a generic non-changeable MCLK3 pin configuration, which is specific to the SoC. Like in a number of other cases please consider to define this and other MCLKx pin configurations in the SoC .dtsi file. > + > +&pm8008 { > + status = "okay"; > +}; > + > +&camss { > + status = "okay"; > + > + vdd-csiphy-1p2-supply = <&pm4125_l5>; > + vdd-csiphy-1p8-supply = <&pm4125_l13>; > + > + ports { > + port@0 { > + csiphy0_ep: endpoint { > + data-lanes = <0 1>; > + remote-endpoint = <&ov9282_ep>; > + }; > + }; > + }; > +}; > + > +&cci { > + status = "okay"; > +}; > + > +&cci_i2c1 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + /* Vision Mezzanine DIP3-1 must be ON (Selects camera CAM0A&B) */ > + camera@60 { > + compatible = "ovti,ov9282"; > + reg = <0x60>; > + > + /* Note: Reset is active-low but ov9282 driver logic is inverted... */ > + reset-gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; > + > + pinctrl-0 = <&cam0a_default>; > + pinctrl-names = "default"; > + > + clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; > + assigned-clocks = <&gcc GCC_CAMSS_MCLK3_CLK>; > + assigned-clock-rates = <24000000>; > + It makes little sense to split properties with blank lines. > + avdd-supply = <&vreg_l3p>; > + dvdd-supply = <&vreg_l1p>; > + dovdd-supply = <&vreg_l7p>; > + > + port { > + ov9282_ep: endpoint { > + link-frequencies = /bits/ 64 <400000000>; > + data-lanes = <1 2>; > + remote-endpoint = <&csiphy0_ep>; It's quite strange to see CSI0 and MCLK3 in the same boat, but the schematics says so. > + }; > + }; > + }; > +}; Reviewed-by: Vladimir Zapolskiy -- Best wishes, Vladimir