From: Krzysztof Kozlowski <krzk@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>,
Xianwei Zhao <xianwei.zhao@amlogic.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Bartosz Golaszewski <brgl@bgdev.pl>,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/3] dt-bindings: pinctrl: Add support for Amlogic A4 SoCs
Date: Fri, 18 Oct 2024 12:13:14 +0200 [thread overview]
Message-ID: <d654d2b2-977b-44c0-8b01-b26f5eb0a3fe@kernel.org> (raw)
In-Reply-To: <1jmsj1rclh.fsf@starbuckisacylon.baylibre.com>
On 18/10/2024 11:20, Jerome Brunet wrote:
> On Fri 18 Oct 2024 at 17:01, Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
>
>> Hi Jerome,
>> Thanks for your reply.
>>
>> On 2024/10/18 16:39, Jerome Brunet wrote:
>>> [ EXTERNAL EMAIL ]
>>> On Fri 18 Oct 2024 at 10:28, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>>
>>>> On 18/10/2024 10:10, Xianwei Zhao via B4 Relay wrote:
>>>>> From: Xianwei Zhao <xianwei.zhao@amlogic.com>
>>>>>
>>>>> Add the new compatible name for Amlogic A4 pin controller, and add
>>>>> a new dt-binding header file which document the detail pin names.
>>> the change does not do what is described here. At least the description
>>> needs updating.
>>>
>>
>> Will do.
>>
>>> So if the pin definition is now in the driver, does it mean that pins have
>>> to be referenced in DT directly using the made up numbers that are
>>> created in pinctrl-amlogic-a4.c at the beginning of patch #2 ?
>>>
>>
>> Yes.
>>
>>> If that's case, it does not look very easy a read.
>>>
>>
>> It does happen. The pin definition does not fall under the category of
>> binding.
>>
>> https://lore.kernel.org/all/106f4321-59e8-49b9-bad3-eeb57627c921@amlogic.com/
>
> So the expectation is that people will write something like:
>
> reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
>
> And others will go in the driver to see that is maps to GPIOX_10 ? the number
> being completly made up, with no link to anything HW/Datasheet
> whatsoever ?
>
> This is how things should be done now ?
Why would you need to do this? Why it cannot be <&gpio 10
GPIO_ACTIVE_LOW>, assuming it is GPIO 10?
Bindings have absolutely nothing to do with it. You have GPIO 10, not
42, right?
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-10-18 10:13 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-18 8:10 [PATCH v3 0/3] Pinctrl: A4: Add pinctrl driver Xianwei Zhao via B4 Relay
2024-10-18 8:10 ` [PATCH v3 1/3] dt-bindings: pinctrl: Add support for Amlogic A4 SoCs Xianwei Zhao via B4 Relay
2024-10-18 8:28 ` Krzysztof Kozlowski
2024-10-18 8:39 ` Jerome Brunet
2024-10-18 9:01 ` Xianwei Zhao
2024-10-18 9:20 ` Jerome Brunet
2024-10-18 10:13 ` Krzysztof Kozlowski [this message]
2024-10-18 12:26 ` Jerome Brunet
2024-10-21 6:31 ` Krzysztof Kozlowski
2024-10-21 6:32 ` Krzysztof Kozlowski
2024-10-18 12:31 ` Neil Armstrong
2024-10-18 15:31 ` Krzysztof Kozlowski
2024-10-21 7:38 ` neil.armstrong
2024-10-21 9:56 ` Krzysztof Kozlowski
2024-10-21 10:38 ` neil.armstrong
2024-10-21 15:27 ` Krzysztof Kozlowski
2024-10-28 9:07 ` Xianwei Zhao
2024-10-28 9:09 ` neil.armstrong
2024-10-28 9:36 ` Xianwei Zhao
2024-10-28 9:46 ` neil.armstrong
2024-10-28 9:59 ` Xianwei Zhao
2024-10-28 10:44 ` neil.armstrong
2024-11-08 6:18 ` Xianwei Zhao
2024-10-18 8:10 ` [PATCH v3 2/3] pinctrl: meson: Add driver " Xianwei Zhao via B4 Relay
2024-10-18 15:51 ` Christophe JAILLET
2024-10-28 9:46 ` Xianwei Zhao
2024-10-18 8:10 ` [PATCH v3 3/3] arm64: dts: amlogic: a4: add pinctrl node Xianwei Zhao via B4 Relay
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