From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 521E3C433F5 for ; Mon, 18 Oct 2021 12:01:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3CBC761260 for ; Mon, 18 Oct 2021 12:01:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229781AbhJRMDX (ORCPT ); Mon, 18 Oct 2021 08:03:23 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:50796 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230399AbhJRMDX (ORCPT ); Mon, 18 Oct 2021 08:03:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1634558472; x=1666094472; h=message-id:subject:from:to:cc:date:in-reply-to: references:mime-version:content-transfer-encoding; bh=jr6MSQpq3y/ZkNOUuLFMDSkZtNAhm5mKOpvVprC0aCs=; b=v33/PED5MJi+j7fqKl+s4MrXK+mATJysTm8uL697ox7Xi3u/dD9Q+7Ql /yChVqbMZy+Hb0D9GWv3yZ7pJCZLl5NosswAkMBuiCD/9EfdttTjcFlB9 FwDUXvJdUAiW93SciVHG7ljiyXDm2EHITRO1BVAGydmPIzR14+ZQQVVFc gCelSUBl9HkUdrTFZOryZNOtPi3CaK6p7X2gjwpRkds3oY/MxSv3KGCgD at7aKghSdHvXqi7LdF5kp8uC2rrCbw85TfHfdPQeEAaTHw7OvIGS6Ct2J lFaYqOolSkiBZTIgwLujuiWoA9c0k6livLuEUnZ2GgCiErGDsZHuO3fKS Q==; IronPort-SDR: vSbaoL9jcVsseWI75UVq/weDcBclJjEne15vFOST/OQ1RrgB1LnFYnNRM/Lx73qhoy6PFV9K60 Om+EJR5MshyeMMOByv4RZ4STGypoRvmNzrIqD7W+/Pl7cRkVDEuhpFojGZvawysIWyx0Ahoi+b 9CgPzCAi3jSwKJmHe/bsVLvRQ2wCpwK+rw2wvnEc+ca5wMzO6QRT+MiYR3w1avAr95nxyupGxp J9ucnbbef/34Bz8dqYEDlbxfdPFlvYgt9tMElEZhLWd/N9nhxn0LoEYHYaYEzu0OtqWovAuRG/ CtJ+c2oz5Vp0EK69hmt3M7Mo X-IronPort-AV: E=Sophos;i="5.85,381,1624345200"; d="scan'208";a="148538464" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 18 Oct 2021 05:01:11 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Mon, 18 Oct 2021 05:01:11 -0700 Received: from [10.205.21.35] (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Mon, 18 Oct 2021 05:01:09 -0700 Message-ID: Subject: Re: [PATCH v4 2/2] reset: mchp: sparx5: Extend support for lan966x From: Steen Hegelund To: Horatiu Vultur , , , , , CC: Andrew Lunn , Date: Mon, 18 Oct 2021 14:01:09 +0200 In-Reply-To: <20211018091522.1113510-3-horatiu.vultur@microchip.com> References: <20211018091522.1113510-1-horatiu.vultur@microchip.com> <20211018091522.1113510-3-horatiu.vultur@microchip.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, 2021-10-18 at 11:15 +0200, Horatiu Vultur wrote: > This patch extends sparx5 driver to support also the lan966x. The > process to reset the switch is the same only it has different offsets. > Therefore make the driver more generic and add support for lan966x. > > Signed-off-by: Horatiu Vultur > Reviewed-by: Andrew Lunn > --- Reviewed-by: Steen Hegelund -- BR Steen -=-=-=-=-=-=-=-=-=-=-=-=-=-= steen.hegelund@microchip.com