From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Andrew Jeffery" Subject: Re: [PATCH] ARM: dts: aspeed-g4: Add all flash chips Date: Thu, 05 Sep 2019 10:03:33 +0930 Message-ID: References: <20190905000221.31445-1-joel@jms.id.au> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20190905000221.31445-1-joel@jms.id.au> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Joel Stanley , =?UTF-8?Q?C=C3=A9dric_Le_Goater?= Cc: devicetree@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org On Thu, 5 Sep 2019, at 09:32, Joel Stanley wrote: > The FMC supports five chip selects, so describe the five possible flash > chips. > > Signed-off-by: Joel Stanley > --- > arch/arm/boot/dts/aspeed-g4.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi > index e465cda40fe7..dffb595d30e4 100644 > --- a/arch/arm/boot/dts/aspeed-g4.dtsi > +++ b/arch/arm/boot/dts/aspeed-g4.dtsi > @@ -67,6 +67,26 @@ > compatible = "jedec,spi-nor"; > status = "disabled"; > }; > + flash@1 { > + reg = < 1 >; > + compatible = "jedec,spi-nor"; > + status = "disabled"; > + }; > + flash@2 { > + reg = < 2 >; > + compatible = "jedec,spi-nor"; > + status = "disabled"; > + }; > + flash@3 { > + reg = < 3 >; > + compatible = "jedec,spi-nor"; > + status = "disabled"; > + }; > + flash@4 { > + reg = < 4 >; > + compatible = "jedec,spi-nor"; > + status = "disabled"; > + }; The FMC supports parallel NOR and NAND interfaces too, but so far no-one has cared for these options, so if they ever do we'll fix it then. Reviewed-by: Andrew Jeffery