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Fri, 09 Oct 2026 03:03:18 -0700 (PDT) Message-ID: Date: Fri, 9 Oct 2026 12:03:16 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 6/7] riscv: dts: eswin: add I2C controller support To: Pinkesh Vaghela Cc: Yulin Lu , Darshan Prajapati , Pritesh Patel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Andi Shyti , Mika Westerberg , "linux-i2c@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-riscv@lists.infradead.org" , Min Lin References: <20260814070007.1662455-1-pinkesh.vaghela@einfochips.com> <20260814070007.1662455-7-pinkesh.vaghela@einfochips.com> Content-Language: en-US From: Samuel Holland In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Pinkesh, On 2026-09-30 3:06 PM, Pinkesh Vaghela wrote: >>> + aon_i2c0: i2c@51830000 { >> >> Please keep nodes sorted (the aon block controllers go below GPIO, etc.). > > As per DTS coding style document [1], "Order of Nodes" states that > "Nodes on any bus, thus using unit addresses for children, shall be ordered by unit > address in ascending order. Alternatively for some subarchitectures, nodes of the > same type can be grouped together, e.g. all I2C controllers one after another even > if this breaks unit address ordering." > > Do you still prefer to change order? Yes. I believe the alternative option is allowed because a few platforms were already doing things that way, to avoid forcing them to change. However, for a new platform, it is best to follow the recommended pattern; simple numerical order is easier to understand, verify, and automate with tooling (which is on the way). Regards, Samuel > [1] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html > > Regards, > Pinkesh > >> >> Regards, >> Samuel >> >>> + compatible = "eswin,eic7700-i2c", "snps,designware-i2c"; >>> + reg = <0x0 0x51830000 0x0 0x8000>; >>> + interrupts = <290>; >>> + clocks = <&clk EIC7700_CLK_GATE_AON_I2C0_PCLK>; >>> + clock-names = "ref"; >>> + clock-frequency = <100000>; >>> + resets = <&reset EIC7700_RESET_ANO0>; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + status = "disabled"; >>> + }; >>> + >>> + aon_i2c1: i2c@51838000 { >>> + compatible = "eswin,eic7700-i2c", "snps,designware-i2c"; >>> + reg = <0x0 0x51838000 0x0 0x8000>; >>> + interrupts = <291>; >>> + clocks = <&clk EIC7700_CLK_GATE_AON_I2C1_PCLK>; >>> + clock-names = "ref"; >>> + clock-frequency = <100000>; >>> + resets = <&reset EIC7700_RESET_ANO1>; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + status = "disabled"; >>> + }; >>> + >>> gpio@51600000 { >>> compatible = "snps,dw-apb-gpio"; >>> reg = <0x0 0x51600000 0x0 0x80>; >