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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 28/06/2024 19:32, Vikram Sharma wrote: > + reg = <0x0 0x0acaf000 0x0 0x5200>, > + <0x0 0x0acb6000 0x0 0x5200>, > + <0x0 0x0acbd000 0x0 0x5200>, > + <0x0 0x0acc4000 0x0 0x5000>, > + <0x0 0x0accb000 0x0 0x5000>, > + <0x0 0x0ace0000 0x0 0x2000>, > + <0x0 0x0ace2000 0x0 0x2000>, > + <0x0 0x0ace4000 0x0 0x2000>, > + <0x0 0x0ace6000 0x0 0x2000>, > + <0x0 0x0ace8000 0x0 0x2000>; > + > + reg-names = "vfe0", > + "vfe1", > + "vfe2", > + "vfe_lite0", > + "vfe_lite1", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "csiphy3", > + "csiphy4"; Per my comment in the last patch for this series. In V2 we should see csid and csid_lite registers defined in the dts and yaml, with the offset enabling code being dropped as a result. --- bod