[PATCH 1/2] riscv: dts: spacemit: add Ethernet and PDMA to OrangePi RV2

[PATCH 1/2] riscv: dts: spacemit: add Ethernet and PDMA to OrangePi RV2

[michael.opdenacker]

From: Michael Opdenacker <michael.opdenacker@rootcommit.com>

Aligning with k1-bananapi-f3.dts

Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
---
 .../boot/dts/spacemit/k1-orangepi-rv2.dts     | 50 +++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
index 337240ebb7b7..2a75ca93b499 100644
--- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
@@ -33,6 +33,56 @@ led1 {
 	};
 };
 
+&eth0 {
+	phy-handle = <&rgmii0>;
+	phy-mode = "rgmii-id";
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac0_cfg>;
+	rx-internal-delay-ps = <0>;
+	tx-internal-delay-ps = <0>;
+	status = "okay";
+
+	mdio-bus {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+
+		reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <100000>;
+
+		rgmii0: phy@1 {
+			reg = <0x1>;
+		};
+	};
+};
+
+&eth1 {
+	phy-handle = <&rgmii1>;
+	phy-mode = "rgmii-id";
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac1_cfg>;
+	rx-internal-delay-ps = <0>;
+	tx-internal-delay-ps = <250>;
+	status = "okay";
+
+	mdio-bus {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+
+		reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <100000>;
+
+		rgmii1: phy@1 {
+			reg = <0x1>;
+		};
+	};
+};
+
+&pdma {
+	status = "okay";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_2_cfg>;

Re: [PATCH 1/2] riscv: dts: spacemit: add Ethernet and PDMA to OrangePi RV2

[Yixun Lan]

Hi Michael,

On 10:02 Fri 17 Oct     , michael.opdenacker@rootcommit.com wrote:
> From: Michael Opdenacker <michael.opdenacker@rootcommit.com>
> 
> Aligning with k1-bananapi-f3.dts
> 
The DTS change looks good, but the commit message is kind of obscure
and unclear, I'd like to have an explict brief description for what
have done in the patch, without people looking at the actual DT code,
although in this case the title already says about it, but we could
still give slightly more info/context:

The OrangePi RV2 board ships two RGMII ethernet ports with each
has an external Motorcomm YT8531C PHY attached, the PHY use gpio
for the reset pin control.

Enable PDMA for OrangePi RV2 board which provided by SpacemiT K1-based SoC.

> Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>

-- 
Yixun Lan (dlan)

Re: [PATCH 1/2] riscv: dts: spacemit: add Ethernet and PDMA to OrangePi RV2

[Vivian Wang]

Hi Michael,

Thank you. I had meant to do this after v6.18-rc1 (which is now), but I
didn't have this hardware to test.

On 10/17/25 18:02, michael.opdenacker@rootcommit.com wrote:
> From: Michael Opdenacker <michael.opdenacker@rootcommit.com>
>
> Aligning with k1-bananapi-f3.dts
>
> Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
> ---
>  .../boot/dts/spacemit/k1-orangepi-rv2.dts     | 50 +++++++++++++++++++
>  1 file changed, 50 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> index 337240ebb7b7..2a75ca93b499 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> @@ -33,6 +33,56 @@ led1 {
>  	};
>  };
>  
> +&eth0 {

Please add eth0 and eth1 to /aliases so that U-Boot, udev, ... can
recognize them. This is used by U-Boot to set the mac-address to the
same value used in booting, and by (systemd) udev to set the interface name.

> +	phy-handle = <&rgmii0>;
> +	phy-mode = "rgmii-id";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&gmac0_cfg>;
> +	rx-internal-delay-ps = <0>;
> +	tx-internal-delay-ps = <0>;

The hardware design of OPI-RV2 is not the same as BPI-F3, so the
parameters here deserves some scruitiny. Same for eth1 below.

I would appreciate at least iperf TCP tests in both directions on both
ethernet ports. The expected speed should be at least 940 Mbit/sec - if
it's much lower than that something is wrong.

Thanks,
Vivian "dramforever" Wang

Re: [PATCH 1/2] riscv: dts: spacemit: add Ethernet and PDMA to OrangePi RV2

[Vivian Wang]

On 10/20/25 17:07, Vivian Wang wrote:

> [...]
>> +	phy-handle = <&rgmii0>;
>> +	phy-mode = "rgmii-id";
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&gmac0_cfg>;
>> +	rx-internal-delay-ps = <0>;
>> +	tx-internal-delay-ps = <0>;
> The hardware design of OPI-RV2 is not the same as BPI-F3, so the
> parameters here deserves some scruitiny. Same for eth1 below.
(Apparently my spelling deserves scrutiny as well. Oh well.)
> I would appreciate at least iperf TCP tests in both directions on both
> ethernet ports. The expected speed should be at least 940 Mbit/sec - if
> it's much lower than that something is wrong.

Okay so this is not *necessarily* a problem, but just for context...

If you look at the DTS files provided by SpacemiT [1] you'd think the
OPI-RV2 also uses RTL8211F Ethernet PHYs. It does not. The schematics
(linked on the board main page [2]) says it uses Motorcomm YT8531C.

This doesn't mean that your DTS is wrong (because we don't write the id
here when the PHY-sent one is correct), but I hope you understand that
what I'm worried is that the electrical characteristics have been
changed since they have changed the board design. This is why I think
actually taking the time to check the delay parameters would be a good idea.

And yes, it would not be surprising if the parameters for BPI-F3 also
works completely reliably for OPI-RV2. The delay tuning has quite a bit
of margin for wiggle room. 

Thanks,
Vivian "dramforever" Wang

[1]: https://github.com/spacemit-com/linux-k1x/blob/k1/arch/riscv/boot/dts/spacemit/k1-x_orangepi-rv2.dts
[2]: http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/service-and-support/Orange-Pi-RV2.html

Re: [PATCH 1/2] riscv: dts: spacemit: add Ethernet and PDMA to OrangePi RV2

[Michael Opdenacker]

Hi Vivian

Thanks for the guidance and help!

On 10/20/25 11:07, Vivian Wang wrote:
> Hi Michael,
>
> Thank you. I had meant to do this after v6.18-rc1 (which is now), but I
> didn't have this hardware to test.
Happy to help testing, if you have code to share :)
>
> On 10/17/25 18:02, michael.opdenacker@rootcommit.com wrote:
>> From: Michael Opdenacker <michael.opdenacker@rootcommit.com>
>>
>> Aligning with k1-bananapi-f3.dts
>>
>> Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
>> ---
>>   .../boot/dts/spacemit/k1-orangepi-rv2.dts     | 50 +++++++++++++++++++
>>   1 file changed, 50 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
>> index 337240ebb7b7..2a75ca93b499 100644
>> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
>> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
>> @@ -33,6 +33,56 @@ led1 {
>>   	};
>>   };
>>   
>> +&eth0 {
> Please add eth0 and eth1 to /aliases so that U-Boot, udev, ... can
> recognize them. This is used by U-Boot to set the mac-address to the
> same value used in booting, and by (systemd) udev to set the interface name.
Done. I'll submit a V2 soon.
>
>> +	phy-handle = <&rgmii0>;
>> +	phy-mode = "rgmii-id";
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&gmac0_cfg>;
>> +	rx-internal-delay-ps = <0>;
>> +	tx-internal-delay-ps = <0>;
> The hardware design of OPI-RV2 is not the same as BPI-F3, so the
> parameters here deserves some scruitiny. Same for eth1 below.
>
> I would appreciate at least iperf TCP tests in both directions on both
> ethernet ports. The expected speed should be at least 940 Mbit/sec - if
> it's much lower than that something is wrong.


Fortunately, the results are good. They are even better than the ones 
from the vendor kernel in OrangePi OS 😂.
I'll share the results in my V2 cover letter.
Thanks again
Michael.

-- 
Michael Opdenacker
Root Commit
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