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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH 1/3] dt-bindings: phy: qcom,pcie2-phy: convert to YAML format
Date: Mon, 19 Dec 2022 10:16:40 +0100	[thread overview]
Message-ID: <da81c0f0-8ad5-cf2d-a62b-0bbb1d98795f@linaro.org> (raw)
In-Reply-To: <20221216234027.539917-1-dmitry.baryshkov@linaro.org>

On 17/12/2022 00:40, Dmitry Baryshkov wrote:
> Convert the bindings for the Qualcomm PCIe2 PHY into the YAML format
> from the text description.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  .../bindings/phy/qcom,pcie2-phy.yaml          | 87 +++++++++++++++++++
>  .../bindings/phy/qcom-pcie2-phy.txt           | 42 ---------
>  2 files changed, 87 insertions(+), 42 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml
>  delete mode 100644 Documentation/devicetree/bindings/phy/qcom-pcie2-phy.txt
> 
> diff --git a/Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml
> new file mode 100644
> index 000000000000..497850a5b428
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml
> @@ -0,0 +1,87 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/qcom,pcie2-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm PCIe2 PHY controller
> +
> +maintainers:
> +  - Vinod Koul <vkoul@kernel.org>
> +
> +description:
> +  The Qualcomm PCIe2 PHY is a Synopsys based phy found in a number of Qualcomm
> +  platforms.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: qcom,qcs404-pcie2-phy
> +      - const: qcom,pcie2-phy
> +
> +  reg:
> +    items:
> +      - description: PHY register set
> +
> +  clocks:
> +    items:
> +      - description: a clock-specifier pair for the "pipe" clock
> +
> +  "#phy-cells":
> +    const: 0
> +
> +  vdda-vp-supply:
> +    description: phandle to low voltage regulator

Drop "phandle to"

> +
> +  vdda-vph-supply:
> +    description: phandle to high voltage regulator

Drop "phandle to"


> +
> +  resets:
> +    maxItems: 2
> +
> +  reset-names:
> +    items:
> +      - const: phy
> +      - const: pipe

Blank line

> +  "#clock-cells":
> +    const: 0
> +
> +  clock-output-names:
> +    maxItems: 1

Maybe keep both next to "clocks"? And same order in "required:".

> +
> +required:
> +  - compatible
> +  - reg
> +  - "#phy-cells"
> +  - clocks
> +  - vdda-vp-supply
> +  - vdda-vph-supply
> +  - resets
> +  - reset-names
> +  - clock-output-names
> +  - "#clock-cells"
> +


Best regards,
Krzysztof


  parent reply	other threads:[~2022-12-19  9:16 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-16 23:40 [PATCH 1/3] dt-bindings: phy: qcom,pcie2-phy: convert to YAML format Dmitry Baryshkov
2022-12-16 23:40 ` [PATCH 2/3] phy: qualcomm: pcie2: register as clock provider Dmitry Baryshkov
2022-12-16 23:40 ` [PATCH 3/3] arm64: dts: qcom: qcs404: register PCIe PHY as a " Dmitry Baryshkov
2022-12-17 15:01   ` Konrad Dybcio
2022-12-20 10:39   ` Krzysztof Kozlowski
2022-12-19  9:16 ` Krzysztof Kozlowski [this message]
2022-12-27 18:03 ` (subset) [PATCH 1/3] dt-bindings: phy: qcom,pcie2-phy: convert to YAML format Bjorn Andersson

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