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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5de58404347sm7153814a12.9.2025.02.11.05.07.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 11 Feb 2025 05:07:41 -0800 (PST) Message-ID: Date: Tue, 11 Feb 2025 14:07:36 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/4] arm64: dts: qcom: sm8550: add missing cpu-cfg interconnect path in the mdss node To: neil.armstrong@linaro.org, Konrad Dybcio , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org> <20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-3-54c96a9d2b7f@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: hTegHW5XI7nUEYjpuTY46O5aJUwSo6cy X-Proofpoint-GUID: hTegHW5XI7nUEYjpuTY46O5aJUwSo6cy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-11_05,2025-02-11_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 mlxlogscore=999 phishscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 adultscore=0 clxscore=1015 mlxscore=0 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502110086 On 11.02.2025 10:07 AM, Neil Armstrong wrote: > On 10/02/2025 17:32, Konrad Dybcio wrote: >> On 10.02.2025 10:32 AM, Neil Armstrong wrote: >>> The bindings requires the mdp0-mem and the cpu-cfg interconnect path, >>> add the missing cpu-cfg path to fix the dtbs check error. >>> >>> Fixes: b8591df49cde ("arm64: dts: qcom: sm8550: correct MDSS interconnects") >>> Signed-off-by: Neil Armstrong >>> --- >>>   arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 +++-- >>>   1 file changed, 3 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi >>> index eac8de4005d82f246bc50f64f09515631d895c99..702b55296b18ff2f8ea62a3391b7de2804aa9f65 100644 >>> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi >>> @@ -3020,8 +3020,9 @@ mdss: display-subsystem@ae00000 { >>>                 power-domains = <&dispcc MDSS_GDSC>; >>>   -            interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>; >>> -            interconnect-names = "mdp0-mem"; >>> +            interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>, >> >> QCOM_ICC_TAG_ALWAYS >> >>> +                    <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_DISPLAY_CFG 0>; >> >> QCOM_ICC_TAG_ACTIVE_ONLY >> >> w that > > So it depends how it articulates with https://lore.kernel.org/all/20250115-topic-sm8x50-upstream-dt-icc-update-v1-0-eaa8b10e2af7@linaro.org/ > > I can rebase on top of it, it would be simpler, but then the Fixes tag won't work anymore. The fixes tag is there for human eyes, autoselection for backports has always been iffy with DT Konrad