From: E Shattow <e@freeshell.de>
To: "Hal Feng" <hal.feng@starfivetech.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <pjw@kernel.org>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Viresh Kumar" <viresh.kumar@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
"Heinrich Schuchardt" <heinrich.schuchardt@canonical.com>
Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 4/8] riscv: dts: starfive: Split jh7110-common.dtsi and move opp table to it
Date: Fri, 7 Nov 2025 03:20:51 -0800 [thread overview]
Message-ID: <dba78080-682f-45d5-9403-bcead3c0eb11@freeshell.de> (raw)
In-Reply-To: <20251107095530.114775-5-hal.feng@starfivetech.com>
On 11/7/25 01:55, Hal Feng wrote:
> Preparing to add JH7110S based board device trees, move the content of
> jh7110-common.dtsi to the new file jh711x-common.dtsi and move opp table
> to jh7110-common.dtsi.
>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
> .../boot/dts/starfive/jh7110-common.dtsi | 665 +-----------------
> .../boot/dts/starfive/jh711x-common.dtsi | 664 +++++++++++++++++
> arch/riscv/boot/dts/starfive/jh711x.dtsi | 16 -
> 3 files changed, 678 insertions(+), 667 deletions(-)
> create mode 100644 arch/riscv/boot/dts/starfive/jh711x-common.dtsi
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> index 809274625615..dd5805ef70a1 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> @@ -5,660 +5,23 @@
> */
>
> /dts-v1/;
> -#include "jh711x.dtsi"
> -#include "jh7110-pinfunc.h"
> -#include <dt-bindings/gpio/gpio.h>
> -#include <dt-bindings/leds/common.h>
> -#include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
> +#include "jh711x-common.dtsi"
>
> -/ {
> - aliases {
> - ethernet0 = &gmac0;
> - i2c0 = &i2c0;
> - i2c2 = &i2c2;
> - i2c5 = &i2c5;
> - i2c6 = &i2c6;
> - mmc0 = &mmc0;
> - mmc1 = &mmc1;
> - serial0 = &uart0;
> +&cpu_opp {
> + opp-375000000 {
> + opp-hz = /bits/ 64 <375000000>;
> + opp-microvolt = <800000>;
> };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
> - memory@40000000 {
> - device_type = "memory";
> - reg = <0x0 0x40000000 0x1 0x0>;
> - bootph-pre-ram;
> - };
> -
> - gpio-restart {
> - compatible = "gpio-restart";
> - gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
> - priority = <224>;
> - };
> -
> - leds {
> - compatible = "gpio-leds";
> -
> - led_status_power: led-0 {
> - gpios = <&aongpio 3 GPIO_ACTIVE_HIGH>;
> - };
> - };
> -
> - pwmdac_codec: audio-codec {
> - compatible = "linux,spdif-dit";
> - #sound-dai-cells = <0>;
> - };
> -
> - sound {
> - compatible = "simple-audio-card";
> - simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - simple-audio-card,dai-link@0 {
> - reg = <0>;
> - format = "left_j";
> - bitclock-master = <&sndcpu0>;
> - frame-master = <&sndcpu0>;
> -
> - sndcpu0: cpu {
> - sound-dai = <&pwmdac>;
> - };
> -
> - codec {
> - sound-dai = <&pwmdac_codec>;
> - };
> - };
> - };
> -};
> -
> -&cpus {
> - timebase-frequency = <4000000>;
> -};
> -
> -&dvp_clk {
> - clock-frequency = <74250000>;
> -};
> -
> -&gmac0_rgmii_rxin {
> - clock-frequency = <125000000>;
> -};
> -
> -&gmac0_rmii_refin {
> - clock-frequency = <50000000>;
> -};
> -
> -&gmac1_rgmii_rxin {
> - clock-frequency = <125000000>;
> -};
> -
> -&gmac1_rmii_refin {
> - clock-frequency = <50000000>;
> -};
> -
> -&hdmitx0_pixelclk {
> - clock-frequency = <297000000>;
> -};
> -
> -&i2srx_bclk_ext {
> - clock-frequency = <12288000>;
> -};
> -
> -&i2srx_lrck_ext {
> - clock-frequency = <192000>;
> -};
> -
> -&i2stx_bclk_ext {
> - clock-frequency = <12288000>;
> -};
> -
> -&i2stx_lrck_ext {
> - clock-frequency = <192000>;
> -};
> -
> -&mclk_ext {
> - clock-frequency = <12288000>;
> -};
> -
> -&osc {
> - clock-frequency = <24000000>;
> -};
> -
> -&rtc_osc {
> - clock-frequency = <32768>;
> -};
> -
> -&tdm_ext {
> - clock-frequency = <49152000>;
> -};
> -
> -&camss {
> - assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
> - <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
> - assigned-clock-rates = <49500000>, <198000000>;
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> - };
> -
> - port@1 {
> - reg = <1>;
> -
> - camss_from_csi2rx: endpoint {
> - remote-endpoint = <&csi2rx_to_camss>;
> - };
> - };
> + opp-500000000 {
> + opp-hz = /bits/ 64 <500000000>;
> + opp-microvolt = <800000>;
> };
> -};
> -
> -&csi2rx {
> - assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
> - assigned-clock-rates = <297000000>;
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> -
> - /* remote MIPI sensor endpoint */
> - };
> -
> - port@1 {
> - reg = <1>;
> -
> - csi2rx_to_camss: endpoint {
> - remote-endpoint = <&camss_from_csi2rx>;
> - };
> - };
> + opp-750000000 {
> + opp-hz = /bits/ 64 <750000000>;
> + opp-microvolt = <800000>;
> };
> -};
> -
> -&gmac0 {
> - phy-handle = <&phy0>;
> - phy-mode = "rgmii-id";
> -
> - mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "snps,dwmac-mdio";
> -
> - phy0: ethernet-phy@0 {
> - reg = <0>;
> - };
> + opp-1500000000 {
> + opp-hz = /bits/ 64 <1500000000>;
> + opp-microvolt = <1040000>;
> };
> };
> -
> -&i2c0 {
> - clock-frequency = <100000>;
> - i2c-sda-hold-time-ns = <300>;
> - i2c-sda-falling-time-ns = <510>;
> - i2c-scl-falling-time-ns = <510>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c0_pins>;
> -};
> -
> -&i2c2 {
> - clock-frequency = <100000>;
> - i2c-sda-hold-time-ns = <300>;
> - i2c-sda-falling-time-ns = <510>;
> - i2c-scl-falling-time-ns = <510>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c2_pins>;
> - status = "okay";
> -};
> -
> -&i2c5 {
> - clock-frequency = <100000>;
> - i2c-sda-hold-time-ns = <300>;
> - i2c-sda-falling-time-ns = <510>;
> - i2c-scl-falling-time-ns = <510>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c5_pins>;
> - status = "okay";
> -
> - axp15060: pmic@36 {
> - compatible = "x-powers,axp15060";
> - reg = <0x36>;
> - interrupt-controller;
> - #interrupt-cells = <1>;
> -
> - regulators {
> - vcc_3v3: dcdc1 {
> - regulator-boot-on;
> - regulator-always-on;
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-name = "vcc_3v3";
> - };
> -
> - vdd_cpu: dcdc2 {
> - regulator-always-on;
> - regulator-min-microvolt = <500000>;
> - regulator-max-microvolt = <1540000>;
> - regulator-name = "vdd_cpu";
> - };
> -
> - emmc_vdd: aldo4 {
> - regulator-boot-on;
> - regulator-always-on;
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-name = "emmc_vdd";
> - };
> - };
> - };
> -
> - eeprom@50 {
> - compatible = "atmel,24c04";
> - reg = <0x50>;
> - bootph-pre-ram;
> - pagesize = <16>;
> - };
> -};
> -
> -&i2c6 {
> - clock-frequency = <100000>;
> - i2c-sda-hold-time-ns = <300>;
> - i2c-sda-falling-time-ns = <510>;
> - i2c-scl-falling-time-ns = <510>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c6_pins>;
> - status = "okay";
> -};
> -
> -&mmc0 {
> - max-frequency = <100000000>;
> - assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
> - assigned-clock-rates = <50000000>;
> - bus-width = <8>;
> - bootph-pre-ram;
> - cap-mmc-highspeed;
> - mmc-ddr-1_8v;
> - mmc-hs200-1_8v;
> - cap-mmc-hw-reset;
> - pinctrl-names = "default";
> - pinctrl-0 = <&mmc0_pins>;
> - vmmc-supply = <&vcc_3v3>;
> - vqmmc-supply = <&emmc_vdd>;
> - status = "okay";
> -};
> -
> -&mmc1 {
> - max-frequency = <100000000>;
> - assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
> - assigned-clock-rates = <50000000>;
> - bus-width = <4>;
> - bootph-pre-ram;
> - cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
> - disable-wp;
> - cap-sd-highspeed;
> - pinctrl-names = "default";
> - pinctrl-0 = <&mmc1_pins>;
> - status = "okay";
> -};
> -
> -&pcie0 {
> - perst-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>;
> - phys = <&pciephy0>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pcie0_pins>;
> -};
> -
> -&pcie1 {
> - perst-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>;
> - phys = <&pciephy1>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pcie1_pins>;
> -};
> -
> -&pwmdac {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pwmdac_pins>;
> -};
> -
> -&qspi {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "okay";
> -
> - nor_flash: flash@0 {
> - compatible = "jedec,spi-nor";
> - reg = <0>;
> - bootph-pre-ram;
> - cdns,read-delay = <2>;
> - spi-max-frequency = <100000000>;
> - cdns,tshsl-ns = <1>;
> - cdns,tsd2d-ns = <1>;
> - cdns,tchsh-ns = <1>;
> - cdns,tslch-ns = <1>;
> -
> - partitions {
> - compatible = "fixed-partitions";
> - #address-cells = <1>;
> - #size-cells = <1>;
> -
> - spl@0 {
> - reg = <0x0 0xf0000>;
> - };
> - uboot-env@f0000 {
> - reg = <0xf0000 0x10000>;
> - };
> - uboot@100000 {
> - reg = <0x100000 0xf00000>;
> - };
> - };
> - };
> -};
> -
> -&pwm {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pwm_pins>;
> -};
> -
> -&spi0 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&spi0_pins>;
> -};
> -
> -&syscrg {
> - assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_ROOT>,
> - <&syscrg JH7110_SYSCLK_BUS_ROOT>,
> - <&syscrg JH7110_SYSCLK_PERH_ROOT>,
> - <&syscrg JH7110_SYSCLK_QSPI_REF>,
> - <&syscrg JH7110_SYSCLK_CPU_CORE>,
> - <&pllclk JH7110_PLLCLK_PLL0_OUT>;
> - assigned-clock-parents = <&pllclk JH7110_PLLCLK_PLL0_OUT>,
> - <&pllclk JH7110_PLLCLK_PLL2_OUT>,
> - <&pllclk JH7110_PLLCLK_PLL2_OUT>,
> - <&syscrg JH7110_SYSCLK_QSPI_REF_SRC>;
> - assigned-clock-rates = <0>, <0>, <0>, <0>, <500000000>, <1500000000>;
> -};
> -
> -&sysgpio {
> - i2c0_pins: i2c0-0 {
> - i2c-pins {
> - pinmux = <GPIOMUX(57, GPOUT_LOW,
> - GPOEN_SYS_I2C0_CLK,
> - GPI_SYS_I2C0_CLK)>,
> - <GPIOMUX(58, GPOUT_LOW,
> - GPOEN_SYS_I2C0_DATA,
> - GPI_SYS_I2C0_DATA)>;
> - bias-disable; /* external pull-up */
> - input-enable;
> - input-schmitt-enable;
> - };
> - };
> -
> - i2c2_pins: i2c2-0 {
> - i2c-pins {
> - pinmux = <GPIOMUX(3, GPOUT_LOW,
> - GPOEN_SYS_I2C2_CLK,
> - GPI_SYS_I2C2_CLK)>,
> - <GPIOMUX(2, GPOUT_LOW,
> - GPOEN_SYS_I2C2_DATA,
> - GPI_SYS_I2C2_DATA)>;
> - bias-disable; /* external pull-up */
> - input-enable;
> - input-schmitt-enable;
> - };
> - };
> -
> - i2c5_pins: i2c5-0 {
> - bootph-pre-ram;
> -
> - i2c-pins {
> - pinmux = <GPIOMUX(19, GPOUT_LOW,
> - GPOEN_SYS_I2C5_CLK,
> - GPI_SYS_I2C5_CLK)>,
> - <GPIOMUX(20, GPOUT_LOW,
> - GPOEN_SYS_I2C5_DATA,
> - GPI_SYS_I2C5_DATA)>;
> - bias-disable; /* external pull-up */
> - bootph-pre-ram;
> - input-enable;
> - input-schmitt-enable;
> - };
> - };
> -
> - i2c6_pins: i2c6-0 {
> - i2c-pins {
> - pinmux = <GPIOMUX(16, GPOUT_LOW,
> - GPOEN_SYS_I2C6_CLK,
> - GPI_SYS_I2C6_CLK)>,
> - <GPIOMUX(17, GPOUT_LOW,
> - GPOEN_SYS_I2C6_DATA,
> - GPI_SYS_I2C6_DATA)>;
> - bias-disable; /* external pull-up */
> - input-enable;
> - input-schmitt-enable;
> - };
> - };
> -
> - mmc0_pins: mmc0-0 {
> - mmc-pins {
> - pinmux = <PINMUX(PAD_SD0_CLK, 0)>,
> - <PINMUX(PAD_SD0_CMD, 0)>,
> - <PINMUX(PAD_SD0_DATA0, 0)>,
> - <PINMUX(PAD_SD0_DATA1, 0)>,
> - <PINMUX(PAD_SD0_DATA2, 0)>,
> - <PINMUX(PAD_SD0_DATA3, 0)>,
> - <PINMUX(PAD_SD0_DATA4, 0)>,
> - <PINMUX(PAD_SD0_DATA5, 0)>,
> - <PINMUX(PAD_SD0_DATA6, 0)>,
> - <PINMUX(PAD_SD0_DATA7, 0)>;
> - bias-pull-up;
> - drive-strength = <12>;
> - input-enable;
> - };
> - };
> -
> - mmc1_pins: mmc1-0 {
> - clk-pins {
> - pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
> - GPOEN_ENABLE,
> - GPI_NONE)>;
> - bias-pull-up;
> - drive-strength = <12>;
> - input-disable;
> - input-schmitt-disable;
> - slew-rate = <0>;
> - };
> -
> - mmc-pins {
> - pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
> - GPOEN_SYS_SDIO1_CMD,
> - GPI_SYS_SDIO1_CMD)>,
> - <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
> - GPOEN_SYS_SDIO1_DATA0,
> - GPI_SYS_SDIO1_DATA0)>,
> - <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
> - GPOEN_SYS_SDIO1_DATA1,
> - GPI_SYS_SDIO1_DATA1)>,
> - <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
> - GPOEN_SYS_SDIO1_DATA2,
> - GPI_SYS_SDIO1_DATA2)>,
> - <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
> - GPOEN_SYS_SDIO1_DATA3,
> - GPI_SYS_SDIO1_DATA3)>;
> - bias-pull-up;
> - drive-strength = <12>;
> - input-enable;
> - input-schmitt-enable;
> - slew-rate = <0>;
> - };
> - };
> -
> - pcie0_pins: pcie0-0 {
> - clkreq-pins {
> - pinmux = <GPIOMUX(27, GPOUT_LOW,
> - GPOEN_DISABLE,
> - GPI_NONE)>;
> - bias-pull-down;
> - drive-strength = <2>;
> - input-enable;
> - input-schmitt-disable;
> - slew-rate = <0>;
> - };
> -
> - wake-pins {
> - pinmux = <GPIOMUX(32, GPOUT_LOW,
> - GPOEN_DISABLE,
> - GPI_NONE)>;
> - bias-pull-up;
> - drive-strength = <2>;
> - input-enable;
> - input-schmitt-disable;
> - slew-rate = <0>;
> - };
> - };
> -
> - pcie1_pins: pcie1-0 {
> - clkreq-pins {
> - pinmux = <GPIOMUX(29, GPOUT_LOW,
> - GPOEN_DISABLE,
> - GPI_NONE)>;
> - bias-pull-down;
> - drive-strength = <2>;
> - input-enable;
> - input-schmitt-disable;
> - slew-rate = <0>;
> - };
> -
> - wake-pins {
> - pinmux = <GPIOMUX(21, GPOUT_LOW,
> - GPOEN_DISABLE,
> - GPI_NONE)>;
> - bias-pull-up;
> - drive-strength = <2>;
> - input-enable;
> - input-schmitt-disable;
> - slew-rate = <0>;
> - };
> - };
> -
> - pwmdac_pins: pwmdac-0 {
> - pwmdac-pins {
> - pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
> - GPOEN_ENABLE,
> - GPI_NONE)>,
> - <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
> - GPOEN_ENABLE,
> - GPI_NONE)>;
> - bias-disable;
> - drive-strength = <2>;
> - input-disable;
> - input-schmitt-disable;
> - slew-rate = <0>;
> - };
> - };
> -
> - pwm_pins: pwm-0 {
> - pwm-pins {
> - pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
> - GPOEN_SYS_PWM0_CHANNEL0,
> - GPI_NONE)>,
> - <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
> - GPOEN_SYS_PWM0_CHANNEL1,
> - GPI_NONE)>;
> - bias-disable;
> - drive-strength = <12>;
> - input-disable;
> - input-schmitt-disable;
> - slew-rate = <0>;
> - };
> - };
> -
> - spi0_pins: spi0-0 {
> - mosi-pins {
> - pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
> - GPOEN_ENABLE,
> - GPI_NONE)>;
> - bias-disable;
> - input-disable;
> - input-schmitt-disable;
> - };
> -
> - miso-pins {
> - pinmux = <GPIOMUX(53, GPOUT_LOW,
> - GPOEN_DISABLE,
> - GPI_SYS_SPI0_RXD)>;
> - bias-pull-up;
> - input-enable;
> - input-schmitt-enable;
> - };
> -
> - sck-pins {
> - pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
> - GPOEN_ENABLE,
> - GPI_SYS_SPI0_CLK)>;
> - bias-disable;
> - input-disable;
> - input-schmitt-disable;
> - };
> -
> - ss-pins {
> - pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
> - GPOEN_ENABLE,
> - GPI_SYS_SPI0_FSS)>;
> - bias-disable;
> - input-disable;
> - input-schmitt-disable;
> - };
> - };
> -
> - uart0_pins: uart0-0 {
> - tx-pins {
> - pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
> - GPOEN_ENABLE,
> - GPI_NONE)>;
> - bias-disable;
> - drive-strength = <12>;
> - input-disable;
> - input-schmitt-disable;
> - slew-rate = <0>;
> - };
> -
> - rx-pins {
> - pinmux = <GPIOMUX(6, GPOUT_LOW,
> - GPOEN_DISABLE,
> - GPI_SYS_UART0_RX)>;
> - bias-disable; /* external pull-up */
> - drive-strength = <2>;
> - input-enable;
> - input-schmitt-enable;
> - slew-rate = <0>;
> - };
> - };
> -};
> -
> -&uart0 {
> - bootph-pre-ram;
> - pinctrl-names = "default";
> - pinctrl-0 = <&uart0_pins>;
> - status = "okay";
> -};
> -
> -&U74_1 {
> - cpu-supply = <&vdd_cpu>;
> -};
> -
> -&U74_2 {
> - cpu-supply = <&vdd_cpu>;
> -};
> -
> -&U74_3 {
> - cpu-supply = <&vdd_cpu>;
> -};
> -
> -&U74_4 {
> - cpu-supply = <&vdd_cpu>;
> -};
> diff --git a/arch/riscv/boot/dts/starfive/jh711x-common.dtsi b/arch/riscv/boot/dts/starfive/jh711x-common.dtsi
> new file mode 100644
> index 000000000000..809274625615
> --- /dev/null
> +++ b/arch/riscv/boot/dts/starfive/jh711x-common.dtsi
> @@ -0,0 +1,664 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> + */
> +
> +/dts-v1/;
> +#include "jh711x.dtsi"
> +#include "jh7110-pinfunc.h"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
> +
> +/ {
> + aliases {
> + ethernet0 = &gmac0;
> + i2c0 = &i2c0;
> + i2c2 = &i2c2;
> + i2c5 = &i2c5;
> + i2c6 = &i2c6;
> + mmc0 = &mmc0;
> + mmc1 = &mmc1;
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0x0 0x40000000 0x1 0x0>;
> + bootph-pre-ram;
> + };
> +
> + gpio-restart {
> + compatible = "gpio-restart";
> + gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
> + priority = <224>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led_status_power: led-0 {
> + gpios = <&aongpio 3 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + pwmdac_codec: audio-codec {
> + compatible = "linux,spdif-dit";
> + #sound-dai-cells = <0>;
> + };
> +
> + sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + simple-audio-card,dai-link@0 {
> + reg = <0>;
> + format = "left_j";
> + bitclock-master = <&sndcpu0>;
> + frame-master = <&sndcpu0>;
> +
> + sndcpu0: cpu {
> + sound-dai = <&pwmdac>;
> + };
> +
> + codec {
> + sound-dai = <&pwmdac_codec>;
> + };
> + };
> + };
> +};
> +
> +&cpus {
> + timebase-frequency = <4000000>;
> +};
> +
> +&dvp_clk {
> + clock-frequency = <74250000>;
> +};
> +
> +&gmac0_rgmii_rxin {
> + clock-frequency = <125000000>;
> +};
> +
> +&gmac0_rmii_refin {
> + clock-frequency = <50000000>;
> +};
> +
> +&gmac1_rgmii_rxin {
> + clock-frequency = <125000000>;
> +};
> +
> +&gmac1_rmii_refin {
> + clock-frequency = <50000000>;
> +};
> +
> +&hdmitx0_pixelclk {
> + clock-frequency = <297000000>;
> +};
> +
> +&i2srx_bclk_ext {
> + clock-frequency = <12288000>;
> +};
> +
> +&i2srx_lrck_ext {
> + clock-frequency = <192000>;
> +};
> +
> +&i2stx_bclk_ext {
> + clock-frequency = <12288000>;
> +};
> +
> +&i2stx_lrck_ext {
> + clock-frequency = <192000>;
> +};
> +
> +&mclk_ext {
> + clock-frequency = <12288000>;
> +};
> +
> +&osc {
> + clock-frequency = <24000000>;
> +};
> +
> +&rtc_osc {
> + clock-frequency = <32768>;
> +};
> +
> +&tdm_ext {
> + clock-frequency = <49152000>;
> +};
> +
> +&camss {
> + assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
> + <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
> + assigned-clock-rates = <49500000>, <198000000>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + camss_from_csi2rx: endpoint {
> + remote-endpoint = <&csi2rx_to_camss>;
> + };
> + };
> + };
> +};
> +
> +&csi2rx {
> + assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
> + assigned-clock-rates = <297000000>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + /* remote MIPI sensor endpoint */
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + csi2rx_to_camss: endpoint {
> + remote-endpoint = <&camss_from_csi2rx>;
> + };
> + };
> + };
> +};
> +
> +&gmac0 {
> + phy-handle = <&phy0>;
> + phy-mode = "rgmii-id";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> +
> + phy0: ethernet-phy@0 {
> + reg = <0>;
> + };
> + };
> +};
> +
> +&i2c0 {
> + clock-frequency = <100000>;
> + i2c-sda-hold-time-ns = <300>;
> + i2c-sda-falling-time-ns = <510>;
> + i2c-scl-falling-time-ns = <510>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c0_pins>;
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + i2c-sda-hold-time-ns = <300>;
> + i2c-sda-falling-time-ns = <510>;
> + i2c-scl-falling-time-ns = <510>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins>;
> + status = "okay";
> +};
> +
> +&i2c5 {
> + clock-frequency = <100000>;
> + i2c-sda-hold-time-ns = <300>;
> + i2c-sda-falling-time-ns = <510>;
> + i2c-scl-falling-time-ns = <510>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c5_pins>;
> + status = "okay";
> +
> + axp15060: pmic@36 {
> + compatible = "x-powers,axp15060";
> + reg = <0x36>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + regulators {
> + vcc_3v3: dcdc1 {
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc_3v3";
> + };
> +
> + vdd_cpu: dcdc2 {
> + regulator-always-on;
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <1540000>;
> + regulator-name = "vdd_cpu";
> + };
> +
> + emmc_vdd: aldo4 {
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "emmc_vdd";
> + };
> + };
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c04";
> + reg = <0x50>;
> + bootph-pre-ram;
> + pagesize = <16>;
> + };
> +};
> +
> +&i2c6 {
> + clock-frequency = <100000>;
> + i2c-sda-hold-time-ns = <300>;
> + i2c-sda-falling-time-ns = <510>;
> + i2c-scl-falling-time-ns = <510>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c6_pins>;
> + status = "okay";
> +};
> +
> +&mmc0 {
> + max-frequency = <100000000>;
> + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
> + assigned-clock-rates = <50000000>;
> + bus-width = <8>;
> + bootph-pre-ram;
> + cap-mmc-highspeed;
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + cap-mmc-hw-reset;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins>;
> + vmmc-supply = <&vcc_3v3>;
> + vqmmc-supply = <&emmc_vdd>;
> + status = "okay";
> +};
> +
> +&mmc1 {
> + max-frequency = <100000000>;
> + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
> + assigned-clock-rates = <50000000>;
> + bus-width = <4>;
> + bootph-pre-ram;
> + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
> + disable-wp;
> + cap-sd-highspeed;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc1_pins>;
> + status = "okay";
> +};
> +
> +&pcie0 {
> + perst-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>;
> + phys = <&pciephy0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie0_pins>;
> +};
> +
> +&pcie1 {
> + perst-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>;
> + phys = <&pciephy1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie1_pins>;
> +};
> +
> +&pwmdac {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pwmdac_pins>;
> +};
> +
> +&qspi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + nor_flash: flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + bootph-pre-ram;
> + cdns,read-delay = <2>;
> + spi-max-frequency = <100000000>;
> + cdns,tshsl-ns = <1>;
> + cdns,tsd2d-ns = <1>;
> + cdns,tchsh-ns = <1>;
> + cdns,tslch-ns = <1>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + spl@0 {
> + reg = <0x0 0xf0000>;
> + };
> + uboot-env@f0000 {
> + reg = <0xf0000 0x10000>;
> + };
> + uboot@100000 {
> + reg = <0x100000 0xf00000>;
> + };
> + };
> + };
> +};
> +
> +&pwm {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pwm_pins>;
> +};
> +
> +&spi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi0_pins>;
> +};
> +
> +&syscrg {
> + assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_ROOT>,
> + <&syscrg JH7110_SYSCLK_BUS_ROOT>,
> + <&syscrg JH7110_SYSCLK_PERH_ROOT>,
> + <&syscrg JH7110_SYSCLK_QSPI_REF>,
> + <&syscrg JH7110_SYSCLK_CPU_CORE>,
> + <&pllclk JH7110_PLLCLK_PLL0_OUT>;
> + assigned-clock-parents = <&pllclk JH7110_PLLCLK_PLL0_OUT>,
> + <&pllclk JH7110_PLLCLK_PLL2_OUT>,
> + <&pllclk JH7110_PLLCLK_PLL2_OUT>,
> + <&syscrg JH7110_SYSCLK_QSPI_REF_SRC>;
> + assigned-clock-rates = <0>, <0>, <0>, <0>, <500000000>, <1500000000>;
> +};
> +
> +&sysgpio {
> + i2c0_pins: i2c0-0 {
> + i2c-pins {
> + pinmux = <GPIOMUX(57, GPOUT_LOW,
> + GPOEN_SYS_I2C0_CLK,
> + GPI_SYS_I2C0_CLK)>,
> + <GPIOMUX(58, GPOUT_LOW,
> + GPOEN_SYS_I2C0_DATA,
> + GPI_SYS_I2C0_DATA)>;
> + bias-disable; /* external pull-up */
> + input-enable;
> + input-schmitt-enable;
> + };
> + };
> +
> + i2c2_pins: i2c2-0 {
> + i2c-pins {
> + pinmux = <GPIOMUX(3, GPOUT_LOW,
> + GPOEN_SYS_I2C2_CLK,
> + GPI_SYS_I2C2_CLK)>,
> + <GPIOMUX(2, GPOUT_LOW,
> + GPOEN_SYS_I2C2_DATA,
> + GPI_SYS_I2C2_DATA)>;
> + bias-disable; /* external pull-up */
> + input-enable;
> + input-schmitt-enable;
> + };
> + };
> +
> + i2c5_pins: i2c5-0 {
> + bootph-pre-ram;
> +
> + i2c-pins {
> + pinmux = <GPIOMUX(19, GPOUT_LOW,
> + GPOEN_SYS_I2C5_CLK,
> + GPI_SYS_I2C5_CLK)>,
> + <GPIOMUX(20, GPOUT_LOW,
> + GPOEN_SYS_I2C5_DATA,
> + GPI_SYS_I2C5_DATA)>;
> + bias-disable; /* external pull-up */
> + bootph-pre-ram;
> + input-enable;
> + input-schmitt-enable;
> + };
> + };
> +
> + i2c6_pins: i2c6-0 {
> + i2c-pins {
> + pinmux = <GPIOMUX(16, GPOUT_LOW,
> + GPOEN_SYS_I2C6_CLK,
> + GPI_SYS_I2C6_CLK)>,
> + <GPIOMUX(17, GPOUT_LOW,
> + GPOEN_SYS_I2C6_DATA,
> + GPI_SYS_I2C6_DATA)>;
> + bias-disable; /* external pull-up */
> + input-enable;
> + input-schmitt-enable;
> + };
> + };
> +
> + mmc0_pins: mmc0-0 {
> + mmc-pins {
> + pinmux = <PINMUX(PAD_SD0_CLK, 0)>,
> + <PINMUX(PAD_SD0_CMD, 0)>,
> + <PINMUX(PAD_SD0_DATA0, 0)>,
> + <PINMUX(PAD_SD0_DATA1, 0)>,
> + <PINMUX(PAD_SD0_DATA2, 0)>,
> + <PINMUX(PAD_SD0_DATA3, 0)>,
> + <PINMUX(PAD_SD0_DATA4, 0)>,
> + <PINMUX(PAD_SD0_DATA5, 0)>,
> + <PINMUX(PAD_SD0_DATA6, 0)>,
> + <PINMUX(PAD_SD0_DATA7, 0)>;
> + bias-pull-up;
> + drive-strength = <12>;
> + input-enable;
> + };
> + };
> +
> + mmc1_pins: mmc1-0 {
> + clk-pins {
> + pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
> + GPOEN_ENABLE,
> + GPI_NONE)>;
> + bias-pull-up;
> + drive-strength = <12>;
> + input-disable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> +
> + mmc-pins {
> + pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
> + GPOEN_SYS_SDIO1_CMD,
> + GPI_SYS_SDIO1_CMD)>,
> + <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
> + GPOEN_SYS_SDIO1_DATA0,
> + GPI_SYS_SDIO1_DATA0)>,
> + <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
> + GPOEN_SYS_SDIO1_DATA1,
> + GPI_SYS_SDIO1_DATA1)>,
> + <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
> + GPOEN_SYS_SDIO1_DATA2,
> + GPI_SYS_SDIO1_DATA2)>,
> + <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
> + GPOEN_SYS_SDIO1_DATA3,
> + GPI_SYS_SDIO1_DATA3)>;
> + bias-pull-up;
> + drive-strength = <12>;
> + input-enable;
> + input-schmitt-enable;
> + slew-rate = <0>;
> + };
> + };
> +
> + pcie0_pins: pcie0-0 {
> + clkreq-pins {
> + pinmux = <GPIOMUX(27, GPOUT_LOW,
> + GPOEN_DISABLE,
> + GPI_NONE)>;
> + bias-pull-down;
> + drive-strength = <2>;
> + input-enable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> +
> + wake-pins {
> + pinmux = <GPIOMUX(32, GPOUT_LOW,
> + GPOEN_DISABLE,
> + GPI_NONE)>;
> + bias-pull-up;
> + drive-strength = <2>;
> + input-enable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> + };
> +
> + pcie1_pins: pcie1-0 {
> + clkreq-pins {
> + pinmux = <GPIOMUX(29, GPOUT_LOW,
> + GPOEN_DISABLE,
> + GPI_NONE)>;
> + bias-pull-down;
> + drive-strength = <2>;
> + input-enable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> +
> + wake-pins {
> + pinmux = <GPIOMUX(21, GPOUT_LOW,
> + GPOEN_DISABLE,
> + GPI_NONE)>;
> + bias-pull-up;
> + drive-strength = <2>;
> + input-enable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> + };
> +
> + pwmdac_pins: pwmdac-0 {
> + pwmdac-pins {
> + pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
> + GPOEN_ENABLE,
> + GPI_NONE)>,
> + <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
> + GPOEN_ENABLE,
> + GPI_NONE)>;
> + bias-disable;
> + drive-strength = <2>;
> + input-disable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> + };
> +
> + pwm_pins: pwm-0 {
> + pwm-pins {
> + pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
> + GPOEN_SYS_PWM0_CHANNEL0,
> + GPI_NONE)>,
> + <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
> + GPOEN_SYS_PWM0_CHANNEL1,
> + GPI_NONE)>;
> + bias-disable;
> + drive-strength = <12>;
> + input-disable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> + };
> +
> + spi0_pins: spi0-0 {
> + mosi-pins {
> + pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
> + GPOEN_ENABLE,
> + GPI_NONE)>;
> + bias-disable;
> + input-disable;
> + input-schmitt-disable;
> + };
> +
> + miso-pins {
> + pinmux = <GPIOMUX(53, GPOUT_LOW,
> + GPOEN_DISABLE,
> + GPI_SYS_SPI0_RXD)>;
> + bias-pull-up;
> + input-enable;
> + input-schmitt-enable;
> + };
> +
> + sck-pins {
> + pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
> + GPOEN_ENABLE,
> + GPI_SYS_SPI0_CLK)>;
> + bias-disable;
> + input-disable;
> + input-schmitt-disable;
> + };
> +
> + ss-pins {
> + pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
> + GPOEN_ENABLE,
> + GPI_SYS_SPI0_FSS)>;
> + bias-disable;
> + input-disable;
> + input-schmitt-disable;
> + };
> + };
> +
> + uart0_pins: uart0-0 {
> + tx-pins {
> + pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
> + GPOEN_ENABLE,
> + GPI_NONE)>;
> + bias-disable;
> + drive-strength = <12>;
> + input-disable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> +
> + rx-pins {
> + pinmux = <GPIOMUX(6, GPOUT_LOW,
> + GPOEN_DISABLE,
> + GPI_SYS_UART0_RX)>;
> + bias-disable; /* external pull-up */
> + drive-strength = <2>;
> + input-enable;
> + input-schmitt-enable;
> + slew-rate = <0>;
> + };
> + };
> +};
> +
> +&uart0 {
> + bootph-pre-ram;
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pins>;
> + status = "okay";
> +};
> +
> +&U74_1 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&U74_2 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&U74_3 {
> + cpu-supply = <&vdd_cpu>;
> +};
> +
> +&U74_4 {
> + cpu-supply = <&vdd_cpu>;
> +};
> diff --git a/arch/riscv/boot/dts/starfive/jh711x.dtsi b/arch/riscv/boot/dts/starfive/jh711x.dtsi
> index 6e56e9d20bb0..a380d3dabedd 100644
> --- a/arch/riscv/boot/dts/starfive/jh711x.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh711x.dtsi
> @@ -205,22 +205,6 @@ core4 {
> cpu_opp: opp-table-0 {
> compatible = "operating-points-v2";
> opp-shared;
> - opp-375000000 {
> - opp-hz = /bits/ 64 <375000000>;
> - opp-microvolt = <800000>;
> - };
> - opp-500000000 {
> - opp-hz = /bits/ 64 <500000000>;
> - opp-microvolt = <800000>;
> - };
> - opp-750000000 {
> - opp-hz = /bits/ 64 <750000000>;
> - opp-microvolt = <800000>;
> - };
> - opp-1500000000 {
> - opp-hz = /bits/ 64 <1500000000>;
> - opp-microvolt = <1040000>;
> - };
> };
>
> thermal-zones {
Reviewed-by: E Shattow <e@freeshell.de>
next prev parent reply other threads:[~2025-11-07 11:21 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-07 9:55 [PATCH v2 0/8] Add support for StarFive VisionFive 2 Lite board Hal Feng
2025-11-07 9:55 ` [PATCH v2 1/8] dt-bindings: PCI: starfive,jh7110-pcie: Add enable-gpios property Hal Feng
2025-11-07 9:55 ` [PATCH v2 2/8] dt-bindings: riscv: Add StarFive JH7110S SoC and VisionFive 2 Lite board Hal Feng
2025-11-07 9:55 ` [PATCH v2 3/8] riscv: dts: starfive: Rename jh7110.dtsi to jh711x.dtsi Hal Feng
2025-11-07 11:18 ` E Shattow
2025-11-07 9:55 ` [PATCH v2 4/8] riscv: dts: starfive: Split jh7110-common.dtsi and move opp table to it Hal Feng
2025-11-07 11:20 ` E Shattow [this message]
2025-11-18 15:12 ` Heinrich Schuchardt
2025-11-07 9:55 ` [PATCH v2 5/8] riscv: dts: starfive: jh711x-common: Move out some nodes to jh7110 common dtsi Hal Feng
2025-11-07 11:24 ` E Shattow
2025-11-07 9:55 ` [PATCH v2 6/8] riscv: dts: starfive: Add common board dtsi for JH7110s and VisionFive 2 Lite variants Hal Feng
2025-11-07 9:55 ` [PATCH v2 7/8] riscv: dts: starfive: Add VisionFive 2 Lite board device tree Hal Feng
2025-11-07 9:55 ` [PATCH v2 8/8] riscv: dts: starfive: Add VisionFive 2 Lite eMMC " Hal Feng
2025-11-07 11:11 ` [PATCH v2 0/8] Add support for StarFive VisionFive 2 Lite board E Shattow
2025-11-07 11:21 ` Heinrich Schuchardt
2025-11-07 12:01 ` E Shattow
2025-11-12 7:24 ` Hal Feng
2025-11-12 13:29 ` E Shattow
2025-11-07 17:20 ` Conor Dooley
2025-11-12 7:47 ` Hal Feng
2025-11-12 13:54 ` Emil Renner Berthing
2025-11-12 14:36 ` Conor Dooley
2025-11-13 3:42 ` Hal Feng
2025-11-13 10:42 ` Emil Renner Berthing
2025-11-13 15:16 ` E Shattow
2025-11-15 16:28 ` Emil Renner Berthing
2025-11-17 6:54 ` Hal Feng
2025-11-17 21:54 ` E Shattow
2025-11-18 2:12 ` Hal Feng
2025-11-18 23:10 ` Conor Dooley
2025-11-19 7:04 ` Heinrich Schuchardt
2025-11-19 8:26 ` E Shattow
2025-11-19 13:27 ` Emil Renner Berthing
2025-11-20 0:47 ` Conor Dooley
2025-11-20 2:47 ` Hal Feng
2025-11-20 2:38 ` Hal Feng
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