From: Krzysztof Kozlowski <krzk@kernel.org>
To: chuan.liu@amlogic.com, Neil Armstrong <neil.armstrong@linaro.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 03/13] dt-bindings: clock: Add Amlogic A9 misc clock control units
Date: Mon, 9 Feb 2026 14:15:53 +0100 [thread overview]
Message-ID: <dbaa1ebc-a0a2-4ca3-bb6d-0c8a07ca1b31@kernel.org> (raw)
In-Reply-To: <20260209-a9_clock_driver-v1-3-a9198dc03d2a@amlogic.com>
On 09/02/2026 06:48, Chuan Liu via B4 Relay wrote:
> +
> + '#clock-cells':
> + description:
> + The clock controller of a module may contain one or more child clock(s).
> + When a clock controller has multiple child clocks, an index is required
> + to specify a particular clock within the clock controller.
> + oneOf:
> + - const: 0
> + description: Single clock output, no specifier needed
> + - const: 1
> + description: Multiple clocks, index selects specific output
> +
> + amlogic,clock-max-frequency:
No
> + description: |
> + Each clock's maximum output frequency is constrained during hardware
> + design to ensure proper timing requirements for the clock network. If the
> + clock frequency configured exceeds this design limit, it can lead to
> + abnormal behavior in modules relying on that clock and may even cause
> + cross-talk that affects other modules.
> +
> + In the driver, this property is parsed, and interface functions from the
> + CCF are called to enforce the clock's maximum frequency, preventing
> + potential issues caused by excessive clock frequency configurations.
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> +
> + amlogic,clock-init-regs:
NAK
...
> diff --git a/include/dt-bindings/clock/amlogic,a9-misc-ccu.h b/include/dt-bindings/clock/amlogic,a9-misc-ccu.h
> new file mode 100644
> index 000000000000..102aff8d68e4
> --- /dev/null
> +++ b/include/dt-bindings/clock/amlogic,a9-misc-ccu.h
> @@ -0,0 +1,53 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
Use the same license as in binding doc.
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-02-09 13:15 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-09 5:48 [PATCH 00/13] clk: amlogic: Introduce A9 PLL and CCU driver support Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 01/13] dt-bindings: clock: Add Amlogic A9 standardized model clock control units Chuan Liu via B4 Relay
2026-02-09 13:14 ` Krzysztof Kozlowski
2026-02-09 13:18 ` Krzysztof Kozlowski
2026-02-09 5:48 ` [PATCH 02/13] dt-bindings: clock: Add Amlogic A9 PLL controllers Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 03/13] dt-bindings: clock: Add Amlogic A9 misc clock control units Chuan Liu via B4 Relay
2026-02-09 13:15 ` Krzysztof Kozlowski [this message]
2026-02-09 5:48 ` [PATCH 04/13] clk: amlogic: Add basic clock driver Chuan Liu via B4 Relay
2026-02-09 13:17 ` Krzysztof Kozlowski
2026-02-09 5:48 ` [PATCH 05/13] clk: amlogic: Add composite " Chuan Liu via B4 Relay
2026-02-09 13:18 ` Krzysztof Kozlowski
2026-02-09 5:48 ` [PATCH 06/13] clk: amlogic: Add noglitch " Chuan Liu via B4 Relay
2026-02-09 21:51 ` Martin Blumenstingl
2026-02-09 5:48 ` [PATCH 07/13] clk: amlogic: Add duandiv " Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 08/13] clk: amlogic: Add PLL driver Chuan Liu via B4 Relay
2026-02-09 15:37 ` kernel test robot
2026-02-09 17:35 ` kernel test robot
2026-02-09 5:48 ` [PATCH 09/13] clk: amlogic: Add DT-based clock registration functions Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 10/13] clk: amlogic: Add A9 standardized model clock control units driver Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 11/13] clk: amlogic: Add A9 PLL controllers driver Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 12/13] clk: amlogic: Add A9 misc clock control units driver Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 13/13] clk: amlogic: Add support for building as combined kernel module Chuan Liu via B4 Relay
2026-02-11 8:34 ` [PATCH 00/13] clk: amlogic: Introduce A9 PLL and CCU driver support Jerome Brunet
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