From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12C3C25F97D; Mon, 28 Apr 2025 16:23:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745857386; cv=none; b=V6UBFzMbTZ5YxdCNP5dE3qn3MCAewVTGXkx+zn0kgfp25lEWfJFoPmkA0Bh1hul1RHt5aMl+ftQjBTtBGDdPfn1VJL/q8z4xn4kswYs/4NMD0o9iCdBY+B14E9UMPz5H++/R7oW94q3rM/i/oNOnaJA/mbsd5ickTjfgDqrvA5g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745857386; c=relaxed/simple; bh=A5Dee5PQdaN7xIaILyq3TBHSqiMRKdnh3vDw28nj2ps=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=AVcOiziyn3iJHbc/ZTP6tkr09GKhpsCmvCgJTN4H8scpRZgHoUimq2WLCow6A7aXPHhRaF+n1u6SlJIodw31FiHRSl5KHHN1M0ItwzfGl/QDS4jYiDRoSLdE5V21lkfXWbchokWQbRk9LWppEeW7aDGAO1y8MYRD0wZmYQ8CY/A= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=nTIF2imE; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="nTIF2imE" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 53SGMuNC3443258 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 28 Apr 2025 11:22:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1745857376; bh=6sopdPzxBrsv7gyGIR0sec5UUj1FEvIaNqj0jbpbgo8=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=nTIF2imESXweQqcWqi30qcEa2puSO/ASPRlz3r3z6TabhqCKGu6EKiKmEGHvyR4UR ZbZrgfFzwDT4cP5gzQBJlFRL4Zp0ypUHp1hcvB211mlTWeiWu5I9aKPdq9bIvwo2uD kPDpZrvuzVDc/w640rQ7zU5nWuPiWZAjH08Rwd2g= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 53SGMu3r107578 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Apr 2025 11:22:56 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 28 Apr 2025 11:22:56 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 28 Apr 2025 11:22:55 -0500 Received: from [10.249.42.149] ([10.249.42.149]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53SGMsuj126290; Mon, 28 Apr 2025 11:22:55 -0500 Message-ID: Date: Mon, 28 Apr 2025 11:22:54 -0500 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 07/11] arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors To: Judith Mendez , Nishanth Menon , Vignesh Raghavendra CC: Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Hari Nagalla , Beleswar Prasad , Markus Schneider-Pargmann , Devarsh Thakkar References: <20250415153147.1844076-1-jm@ti.com> <20250415153147.1844076-8-jm@ti.com> Content-Language: en-US From: Andrew Davis In-Reply-To: <20250415153147.1844076-8-jm@ti.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea On 4/15/25 10:31 AM, Judith Mendez wrote: > From: Devarsh Thakkar > > For each remote proc, reserve memory for IPC and bind the mailbox > assignments. Two memory regions are reserved for each remote processor. > The first region of 1MB of memory is used for Vring shared buffers > and the second region is used as external memory to the remote processor > for the resource table and for tracebuffer allocations. > > Signed-off-by: Devarsh Thakkar > Signed-off-by: Hari Nagalla > Signed-off-by: Judith Mendez > --- > arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 50 ++++++++++++++++++++++--- > 1 file changed, 44 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts > index d29f524600af0..05760507da4ed 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts > +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts > @@ -49,6 +49,30 @@ reserved-memory { > #size-cells = <2>; > ranges; > > + mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9b800000 0x00 0x100000>; > + no-map; > + }; > + > + mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9b900000 0x00 0xf00000>; > + no-map; > + }; > + > + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9c800000 0x00 0x100000>; > + no-map; > + }; > + > + wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9c900000 0x00 0xf00000>; Since this size did change we should keep an eye out for any existing firmware that made use of the top part of this DDR range. I haven't found any yet, but please do work with the MCU+SDK folks to get this fixed here[0] so no one ever runs into issues over this someday. Reviewed-by: Andrew Davis [0] https://github.com/TexasInstruments/mcupsdk-core-k3/blob/93978d24d1224b43a898e9bc5182569b9abd1545/.project/templates/am62px/common/linker_wkup-r5f.cmd.xdt#L294 > + no-map; > + }; > + > secure_tfa_ddr: tfa@9e780000 { > reg = <0x00 0x9e780000 0x00 0x80000>; > no-map; > @@ -58,12 +82,6 @@ secure_ddr: optee@9e800000 { > reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ > no-map; > }; > - > - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { > - compatible = "shared-dma-pool"; > - reg = <0x00 0x9c900000 0x00 0x01e00000>; > - no-map; > - }; > }; > > vmain_pd: regulator-0 { > @@ -640,6 +658,26 @@ mbox_mcu_r5_0: mbox-mcu-r5-0 { > }; > }; > > +&wkup_r5fss0 { > + status = "okay"; > +}; > + > +&wkup_r5fss0_core0 { > + mboxes = <&mailbox0_cluster0 &mbox_r5_0>; > + memory-region = <&wkup_r5fss0_core0_dma_memory_region>, > + <&wkup_r5fss0_core0_memory_region>; > +}; > + > +&mcu_r5fss0 { > + status = "okay"; > +}; > + > +&mcu_r5fss0_core0 { > + mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>; > + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, > + <&mcu_r5fss0_core0_memory_region>; > +}; > + > &main_uart0 { > pinctrl-names = "default"; > pinctrl-0 = <&main_uart0_pins_default>;