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Tue, 21 Oct 2025 01:48:22 -0700 (PDT) Message-ID: Date: Tue, 21 Oct 2025 11:48:20 +0300 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 4/7] reset: rzg2l-usbphy-ctrl: Add support for USB PWRRDY From: Claudiu Beznea To: Philipp Zabel , vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, yoshihiro.shimoda.uh@renesas.com, biju.das.jz@bp.renesas.com Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Claudiu Beznea , Wolfram Sang References: <20250925100302.3508038-1-claudiu.beznea.uj@bp.renesas.com> <20250925100302.3508038-5-claudiu.beznea.uj@bp.renesas.com> <66d85e70-efb8-4a45-9164-55b123691b70@tuxon.dev> <6d4bc69c-1571-4d98-b0d4-214c68be118e@tuxon.dev> <77678dd6-071b-4911-a5c5-f1519c92e91a@tuxon.dev> <6ba1fd1f07753c9b98a57c87bffbbee16971da7a.camel@pengutronix.de> <19746f65-bf10-4687-9e2b-b259220a9ea8@tuxon.dev> Content-Language: en-US In-Reply-To: <19746f65-bf10-4687-9e2b-b259220a9ea8@tuxon.dev> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, Philipp, On 10/15/25 11:19, Claudiu Beznea wrote: >>>>>>> I see v2 and v3 tried to control the bit from the PHY drivers, and in >>>>>>> v4 we were are already back to the reset driver. >>>>>> v2 passed the system controller (SYSC) phandle to the USB PHYs only (though >>>>>> renesas,sysc-signals DT property) where the PWRRDY bit was set. The PWRRDY >>>>>> bit was referenced counted in the SYSC driver though regmap APIs. >>>>>> >>>>>> v3 used the approach from v2 but passed the renesas,sysc-signals to all the >>>>>> USB related drivers. >>>>>> >>>>>> Then, in v4, the PWRRDY refcounting was dropped and passed >>>>>> renesas,sysc-signals only to the USB PHY CTRL DT node in the idea that this >>>>>> is the node that will always be probed first as all the other USB blocks >>>>>> need it and request resets from it. >>>>>> >>>>>> v5 and v6 kept the approach from v4 and only addressed misc comments or >>>>>> things that I noticed. >>>>> Could you please let me know if you are OK with the approach proposed in >>>>> v7, so that I can start preparing a new version addressing your comments? >>>> If the PWRRDY signal is an input to the USB2PHY control block, and not >>>> only to the PHY blocks, I have no issue with this being handled in the >>>> usb2phy reset driver - >>> Yes, this is how the Renesas HW team confirmed they are related. >> Ok, understood. I concur that usb2phy-ctrl is the right place for the >> sysc property then. >> >>>> iff it is not sensible to just control the >>>> signal from the power domain driver. >>> As mentioned above, that can be done as well but, passing a SYSC phandle to >>> the CPG DT node will not be valid from the HW description point of view. >>> >>>> If we have to handle it in the reset driver, I'd prefer to see this >>>> controlled with a dev_pm_genpd_add_notifier(). If that is not possible, >>>> I'd like to understand why. >>> From the code inspection I did, that can be done. From what I can tell at >>> the moment, I'll have to register a gepnd notifier from >>> reset-rzg2l-usbphy-ctrl, before runtime resuming the device and control the >>> SYSC PWRRDY from it. >> I'd like that. > Now, that we found the genpd notifier is not a solution, could you please > let me know how would you like me to proceed? After discussing all the possible (known) solutions, could you please let me know if you are OK with the approach in this series? Thank you, Claudiu