Re: [PATCH v5 3/5] arm64: dts: agilex: add dtsi for PCIe Root Port

[Krzysztof Kozlowski <krzk@kernel.org>]

On 01/02/2025 20:12, matthew.gerlach@linux.intel.com wrote:
>>
>>> they are also referenced in the following:
>>>      Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml
>>>      arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
>>> I am not exactly sure where the right place is to define them, maybe
>>> Documentation/devicetree/bindings/arm/intel,socfpga.yaml. On the other
>>> hand, no code references these names; so it might make sense to just
>>> remove them.
>>
>> In general: nowhere, because simple bus does not have such properties.
>> It's not about reg-names only - you cannot have reg. You just did not
>> define here simple-bus.
> 
> I understand. I will remove reg and reg-names.

If you have there IO address space, then removal does not sound right,
either. You just need to come with the bindings for this dedicated
device, whatever this is. There is no description here, not much in
commit msg, so I don't know what is the device you are adding. PCI has
several bindings, so is this just host bridge?


Best regards,
Krzysztof