From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2105C32772 for ; Thu, 18 Aug 2022 08:51:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238536AbiHRIvN convert rfc822-to-8bit (ORCPT ); Thu, 18 Aug 2022 04:51:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242666AbiHRIvM (ORCPT ); Thu, 18 Aug 2022 04:51:12 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FBC8B0288 for ; Thu, 18 Aug 2022 01:51:11 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1oObEu-0000wW-8J; Thu, 18 Aug 2022 10:50:56 +0200 Received: from [2a0a:edc0:0:900:1d::4e] (helo=lupine) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1oObEs-000Teu-1b; Thu, 18 Aug 2022 10:50:54 +0200 Received: from pza by lupine with local (Exim 4.94.2) (envelope-from ) id 1oObEr-0002qn-Co; Thu, 18 Aug 2022 10:50:53 +0200 Message-ID: Subject: Re: [PATCH v3 1/6] reset: imx7: Add the iMX8MP PCIe PHY PERST support From: Philipp Zabel To: Richard Zhu , l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh@kernel.org, shawnguo@kernel.org, vkoul@kernel.org, alexander.stein@ew.tq-group.com, marex@denx.de Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Date: Thu, 18 Aug 2022 10:50:53 +0200 In-Reply-To: <1660806153-29001-2-git-send-email-hongxing.zhu@nxp.com> References: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> <1660806153-29001-2-git-send-email-hongxing.zhu@nxp.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT User-Agent: Evolution 3.38.3-1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Richard, On Do, 2022-08-18 at 15:02 +0800, Richard Zhu wrote: > On i.MX7/iMX8MM/iMX8MQ, the initialized default value of PERST bit(BIT3) > of SRC_PCIEPHY_RCR is 1b'1. > But i.MX8MP has one inversed default value 1b'0 of PERST bit. > > And the PERST bit should be kept 1b'1 after power and clocks are stable. > So add the i.MX8MP PCIe PHY PERST support here. the description is good now. It would be nice if this could also be mentioned in the Reference Manual. Please replace "add" with "fix" in the subject, as I requested earlier: "reset: imx7: Fix i.MX8MP PCIe PHY PERST support". And add a fixes line: Fixes: e08672c03981 ("reset: imx7: Add support for i.MX8MP SoC") With those two changes, Reviewed-by: Philipp Zabel regards Philipp