* [PATCH v2 0/2] Add DSS support for AM625 SoC @ 2022-06-23 10:35 Aradhya Bhatia 2022-06-23 10:35 ` [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add am625 dss compatible Aradhya Bhatia 2022-06-23 10:35 ` [PATCH 2/2] drm/tidss: Add support for AM625 DSS Aradhya Bhatia 0 siblings, 2 replies; 5+ messages in thread From: Aradhya Bhatia @ 2022-06-23 10:35 UTC (permalink / raw) To: Tomi Valkeinen, Jyri Sarha, Rob Herring, David Airlie, Daniel Vetter, Krzysztof Kozlowski Cc: Nishanth Menon, Vignesh Raghavendra, Rahul T R, Devarsh Thakkar, DRI Development List, Devicetree List, Linux Kernel List, Aradhya Bhatia This patch series adds a new compatible for the DSS IP on TI's AM625 SoC. It further adds the required support for the same in the tidss driver. The IP is a newer version of the DSS IP available on AM65X SoC, with a major change being in the addition of another OLDI TX inside it. With the help of 2 OLDI TXes, this new DSS IP supports OLDI displays with a resolution of upto 2K. The OLDI support will be added subsequently. Changelog: V2: - Removed redundant regsiter array Aradhya Bhatia (2): dt-bindings: display: ti,am65x-dss: Add am625 dss compatible drm/tidss: Add support for AM625 DSS .../bindings/display/ti/ti,am65x-dss.yaml | 4 +- drivers/gpu/drm/tidss/tidss_dispc.c | 56 ++++++++++++++++++- drivers/gpu/drm/tidss/tidss_dispc.h | 2 + drivers/gpu/drm/tidss/tidss_drv.c | 1 + 4 files changed, 61 insertions(+), 2 deletions(-) -- 2.36.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add am625 dss compatible 2022-06-23 10:35 [PATCH v2 0/2] Add DSS support for AM625 SoC Aradhya Bhatia @ 2022-06-23 10:35 ` Aradhya Bhatia 2022-06-23 13:29 ` Krzysztof Kozlowski 2022-06-23 10:35 ` [PATCH 2/2] drm/tidss: Add support for AM625 DSS Aradhya Bhatia 1 sibling, 1 reply; 5+ messages in thread From: Aradhya Bhatia @ 2022-06-23 10:35 UTC (permalink / raw) To: Tomi Valkeinen, Jyri Sarha, Rob Herring, David Airlie, Daniel Vetter, Krzysztof Kozlowski Cc: Nishanth Menon, Vignesh Raghavendra, Rahul T R, Devarsh Thakkar, DRI Development List, Devicetree List, Linux Kernel List, Aradhya Bhatia Add ti,am625-dss compatible string. The DSS IP on TI's AM625 SoC is an update from the DSS on TI's AM65X SoC. The former has an additional OLDI TX to enable a 2K resolution on OLDI displays or enable 2 duplicated displayw with a smaller resolution. Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> Reviewed-by: Rahul T R <r-ravikumar@ti.com> --- .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 5c7d2cbc4aac..0fc77674eb50 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -19,7 +19,9 @@ description: | properties: compatible: - const: ti,am65x-dss + enum: + - ti,am65x-dss + - ti,am625-dss reg: description: -- 2.36.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add am625 dss compatible 2022-06-23 10:35 ` [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add am625 dss compatible Aradhya Bhatia @ 2022-06-23 13:29 ` Krzysztof Kozlowski 0 siblings, 0 replies; 5+ messages in thread From: Krzysztof Kozlowski @ 2022-06-23 13:29 UTC (permalink / raw) To: Aradhya Bhatia, Tomi Valkeinen, Jyri Sarha, Rob Herring, David Airlie, Daniel Vetter, Krzysztof Kozlowski Cc: Nishanth Menon, Vignesh Raghavendra, Rahul T R, Devarsh Thakkar, DRI Development List, Devicetree List, Linux Kernel List On 23/06/2022 12:35, Aradhya Bhatia wrote: > Add ti,am625-dss compatible string. > The DSS IP on TI's AM625 SoC is an update from the DSS on TI's AM65X > SoC. The former has an additional OLDI TX to enable a 2K resolution on > OLDI displays or enable 2 duplicated displayw with a smaller resolution. s/displayw/displays/ > > Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> > Reviewed-by: Rahul T R <r-ravikumar@ti.com> > --- > .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml > index 5c7d2cbc4aac..0fc77674eb50 100644 > --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml > +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml > @@ -19,7 +19,9 @@ description: | > > properties: > compatible: > - const: ti,am65x-dss > + enum: > + - ti,am65x-dss > + - ti,am625-dss Alphabetical order? Avoids conflicts... Best regards, Krzysztof ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] drm/tidss: Add support for AM625 DSS 2022-06-23 10:35 [PATCH v2 0/2] Add DSS support for AM625 SoC Aradhya Bhatia 2022-06-23 10:35 ` [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add am625 dss compatible Aradhya Bhatia @ 2022-06-23 10:35 ` Aradhya Bhatia 1 sibling, 0 replies; 5+ messages in thread From: Aradhya Bhatia @ 2022-06-23 10:35 UTC (permalink / raw) To: Tomi Valkeinen, Jyri Sarha, Rob Herring, David Airlie, Daniel Vetter, Krzysztof Kozlowski Cc: Nishanth Menon, Vignesh Raghavendra, Rahul T R, Devarsh Thakkar, DRI Development List, Devicetree List, Linux Kernel List, Aradhya Bhatia Add support for the DSS IP on TI's new AM625 SoC in the tidss driver. Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> Reviewed-by: Rahul T R <r-ravikumar@ti.com> --- drivers/gpu/drm/tidss/tidss_dispc.c | 56 ++++++++++++++++++++++++++++- drivers/gpu/drm/tidss/tidss_dispc.h | 2 ++ drivers/gpu/drm/tidss/tidss_drv.c | 1 + 3 files changed, 58 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c index dae47853b728..f084f0688a54 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -272,6 +272,55 @@ const struct dispc_features dispc_j721e_feats = { .vid_order = { 1, 3, 0, 2 }, }; +const struct dispc_features dispc_am625_feats = { + .max_pclk_khz = { + [DISPC_VP_DPI] = 165000, + [DISPC_VP_OLDI] = 165000, + }, + + .scaling = { + .in_width_max_5tap_rgb = 1280, + .in_width_max_3tap_rgb = 2560, + .in_width_max_5tap_yuv = 2560, + .in_width_max_3tap_yuv = 4096, + .upscale_limit = 16, + .downscale_limit_5tap = 4, + .downscale_limit_3tap = 2, + /* + * The max supported pixel inc value is 255. The value + * of pixel inc is calculated like this: 1+(xinc-1)*bpp. + * The maximum bpp of all formats supported by the HW + * is 8. So the maximum supported xinc value is 32, + * because 1+(32-1)*8 < 255 < 1+(33-1)*4. + */ + .xinc_max = 32, + }, + + .subrev = DISPC_AM625, + + .common = "common", + .common_regs = tidss_am65x_common_regs, + + .num_vps = 2, + .vp_name = { "vp1", "vp2" }, + .ovr_name = { "ovr1", "ovr2" }, + .vpclk_name = { "vp1", "vp2" }, + .vp_bus_type = { DISPC_VP_OLDI, DISPC_VP_DPI }, + + .vp_feat = { .color = { + .has_ctm = true, + .gamma_size = 256, + .gamma_type = TIDSS_GAMMA_8BIT, + }, + }, + + .num_planes = 2, + /* note: vid is plane_id 0 and vidl1 is plane_id 1 */ + .vid_name = { "vid", "vidl1" }, + .vid_lite = { false, true, }, + .vid_order = { 1, 0 }, +}; + static const u16 *dispc_common_regmap; struct dss_vp_data { @@ -775,6 +824,7 @@ dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc) return dispc_k2g_read_and_clear_irqstatus(dispc); case DISPC_AM65X: case DISPC_J721E: + case DISPC_AM625: return dispc_k3_read_and_clear_irqstatus(dispc); default: WARN_ON(1); @@ -790,6 +840,7 @@ void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask) break; case DISPC_AM65X: case DISPC_J721E: + case DISPC_AM625: dispc_k3_set_irqenable(dispc, mask); break; default: @@ -1279,6 +1330,7 @@ void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane, x, y, layer); break; case DISPC_AM65X: + case DISPC_AM625: dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport, x, y, layer); break; @@ -2202,6 +2254,7 @@ static void dispc_plane_init(struct dispc_device *dispc) break; case DISPC_AM65X: case DISPC_J721E: + case DISPC_AM625: dispc_k3_plane_init(dispc); break; default: @@ -2307,6 +2360,7 @@ static void dispc_vp_write_gamma_table(struct dispc_device *dispc, dispc_k2g_vp_write_gamma_table(dispc, hw_videoport); break; case DISPC_AM65X: + case DISPC_AM625: dispc_am65x_vp_write_gamma_table(dispc, hw_videoport); break; case DISPC_J721E: @@ -2580,7 +2634,7 @@ int dispc_runtime_resume(struct dispc_device *dispc) REG_GET(dispc, DSS_SYSSTATUS, 2, 2), REG_GET(dispc, DSS_SYSSTATUS, 3, 3)); - if (dispc->feat->subrev == DISPC_AM65X) + if (dispc->feat->subrev == DISPC_AM65X || dispc->feat->subrev == DISPC_AM625) dev_dbg(dispc->dev, "OLDI RESETDONE %d,%d,%d\n", REG_GET(dispc, DSS_SYSSTATUS, 5, 5), REG_GET(dispc, DSS_SYSSTATUS, 6, 6), diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/tidss_dispc.h index e49432f0abf5..a28005dafdc9 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.h +++ b/drivers/gpu/drm/tidss/tidss_dispc.h @@ -61,6 +61,7 @@ enum dispc_dss_subrevision { DISPC_K2G, DISPC_AM65X, DISPC_J721E, + DISPC_AM625, }; struct dispc_features { @@ -88,6 +89,7 @@ struct dispc_features { extern const struct dispc_features dispc_k2g_feats; extern const struct dispc_features dispc_am65x_feats; extern const struct dispc_features dispc_j721e_feats; +extern const struct dispc_features dispc_am625_feats; void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask); dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc); diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tidss_drv.c index 04cfff89ee51..326059e99696 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.c +++ b/drivers/gpu/drm/tidss/tidss_drv.c @@ -235,6 +235,7 @@ static const struct of_device_id tidss_of_table[] = { { .compatible = "ti,k2g-dss", .data = &dispc_k2g_feats, }, { .compatible = "ti,am65x-dss", .data = &dispc_am65x_feats, }, { .compatible = "ti,j721e-dss", .data = &dispc_j721e_feats, }, + { .compatible = "ti,am625-dss", .data = &dispc_am625_feats, }, { } }; -- 2.36.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 0/2] Add DSS support for AM625 SoC @ 2022-06-20 12:32 Aradhya Bhatia 2022-06-20 12:32 ` [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add am625 dss compatible Aradhya Bhatia 0 siblings, 1 reply; 5+ messages in thread From: Aradhya Bhatia @ 2022-06-20 12:32 UTC (permalink / raw) To: Tomi Valkeinen, Jyri Sarha, Rob Herring, David Airlie Cc: Nishanth Menon, Vignesh Raghavendra, Rahul T R, DRI Devel List, Devicetree List, Linux Kernel, Aradhya Bhatia This patch series adds a new compatible for the DSS IP on TI's AM625 SoC. It further adds the required support for the same in the tidss driver. The IP is a newer version of the DSS IP available on AM65X SoC, with a major change being in the addition of another OLDI TX inside it. With the help of 2 OLDI TXes, this new DSS IP supports OLDI displays with a resolution of upto 2K. The OLDI support will be added subsequently. Aradhya Bhatia (2): dt-bindings: display: ti,am65x-dss: Add am625 dss compatible drm/tidss: Add support for AM625 DSS .../bindings/display/ti/ti,am65x-dss.yaml | 4 +- drivers/gpu/drm/tidss/tidss_dispc.c | 83 ++++++++++++++++++- drivers/gpu/drm/tidss/tidss_dispc.h | 2 + drivers/gpu/drm/tidss/tidss_drv.c | 1 + 4 files changed, 88 insertions(+), 2 deletions(-) -- 2.36.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add am625 dss compatible 2022-06-20 12:32 [PATCH 0/2] Add DSS support for AM625 SoC Aradhya Bhatia @ 2022-06-20 12:32 ` Aradhya Bhatia 0 siblings, 0 replies; 5+ messages in thread From: Aradhya Bhatia @ 2022-06-20 12:32 UTC (permalink / raw) To: Tomi Valkeinen, Jyri Sarha, Rob Herring, David Airlie Cc: Nishanth Menon, Vignesh Raghavendra, Rahul T R, DRI Devel List, Devicetree List, Linux Kernel, Aradhya Bhatia Add ti,am625-dss compatible string. The DSS IP on TI's AM625 SoC is an update from the DSS on TI's AM65X SoC. The former has an additional OLDI TX to enable a 2K resolution on OLDI displays or enable 2 duplicated displayw with a smaller resolution. Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> --- .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 5c7d2cbc4aac..0fc77674eb50 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -19,7 +19,9 @@ description: | properties: compatible: - const: ti,am65x-dss + enum: + - ti,am65x-dss + - ti,am625-dss reg: description: -- 2.36.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-06-23 13:30 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-06-23 10:35 [PATCH v2 0/2] Add DSS support for AM625 SoC Aradhya Bhatia 2022-06-23 10:35 ` [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add am625 dss compatible Aradhya Bhatia 2022-06-23 13:29 ` Krzysztof Kozlowski 2022-06-23 10:35 ` [PATCH 2/2] drm/tidss: Add support for AM625 DSS Aradhya Bhatia -- strict thread matches above, loose matches on Subject: below -- 2022-06-20 12:32 [PATCH 0/2] Add DSS support for AM625 SoC Aradhya Bhatia 2022-06-20 12:32 ` [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add am625 dss compatible Aradhya Bhatia
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