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From: Sergei Shtylyov <sergei.shtylyov@gmail.com>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Marek Vasut <marek.vasut+renesas@gmail.com>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Magnus Damm <magnus.damm@gmail.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-pci <linux-pci@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH 3/5] arm64: dts: renesas: r8a774a1: Add PCIe EP nodes
Date: Tue, 18 Aug 2020 11:38:40 +0300	[thread overview]
Message-ID: <de262150-96f1-dcf6-405c-db91c1daf0ec@gmail.com> (raw)
In-Reply-To: <CA+V-a8v74fkzE8SYaaA5Wg=NT_mdgjNLTd0nha=UbHEC0pw0UA@mail.gmail.com>

On 18.08.2020 10:23, Lad, Prabhakar wrote:

[...]
>>> Add PCIe EP nodes to R8A774A1 (RZ/G2M) SoC dtsi.
>>>
>>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>>> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
>>> ---
>>>    arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 38 +++++++++++++++++++++++
>>>    1 file changed, 38 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
>>> index a603d947970e..50e9ed16a36d 100644
>>> --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
>>> +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
>>> @@ -2369,6 +2369,44 @@
>>>                        status = "disabled";
>>>                };
>>>
>>> +             pciec0_ep: pcie_ep@fe000000 {
>>
>>      Hyphens are preferred over underscores in the node/prop names.
>>
>> [...]
>> +                pciec1_ep: pcie_ep@ee800000 {
>>
>>      Ditto, should be "pci-ep@ee800000".
>>
> My bad will fix that in v2.

    Sorry, I meant to type "pcie-ep@ee800000".

> Cheers,
> Prabhakar

MBR, Sergei

  reply	other threads:[~2020-08-18  8:38 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-14 17:30 [PATCH 0/5] Add PCIe EP nodes on RZ/G2[EMN] Lad Prabhakar
2020-08-14 17:30 ` [PATCH 1/5] dt-bindings: pci: rcar-pci-ep: Document r8a774a1 and r8a774b1 Lad Prabhakar
2020-08-21 12:04   ` Geert Uytterhoeven
2020-08-24 11:35   ` Yoshihiro Shimoda
2020-08-25  2:16   ` Rob Herring
2020-08-14 17:30 ` [PATCH 2/5] misc: pci_endpoint_test: Add Device ID for RZ/G2M and RZ/G2N PCIe controllers Lad Prabhakar
2020-08-21 12:22   ` Geert Uytterhoeven
2020-08-14 17:30 ` [PATCH 3/5] arm64: dts: renesas: r8a774a1: Add PCIe EP nodes Lad Prabhakar
2020-08-15  8:45   ` Sergei Shtylyov
2020-08-18  7:23     ` Lad, Prabhakar
2020-08-18  8:38       ` Sergei Shtylyov [this message]
2020-08-21 12:33   ` Geert Uytterhoeven
2020-08-14 17:30 ` [PATCH 4/5] arm64: dts: renesas: r8a774b1: " Lad Prabhakar
2020-08-21 12:33   ` Geert Uytterhoeven
2020-08-14 17:30 ` [PATCH 5/5] arm64: dts: renesas: r8a774c0: Add PCIe EP node Lad Prabhakar
2020-08-21 12:34   ` Geert Uytterhoeven
2020-09-07 10:09 ` [PATCH 0/5] Add PCIe EP nodes on RZ/G2[EMN] Lorenzo Pieralisi
2020-09-07 10:11   ` Lad, Prabhakar
2020-09-07 10:14 ` Lorenzo Pieralisi

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