Re: [PATCH v3 4/7] arm64: dts: ti: k3-serdes: Add Serdes1 lane-muxing macros for J722S

[Roger Quadros <rogerq@kernel.org>]

On 24/05/2024 12:05, Siddharth Vadapalli wrote:
> The Serdes1 instance of the Serdes on J722S SoC is a single lane Serdes
> that is muxed across PCIe and CPSW. Define the lane-muxing macros to be
> used as the idle state values.
> 
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
> Current patch is v1. No changelog.
> 
>  arch/arm64/boot/dts/ti/k3-serdes.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-serdes.h b/arch/arm64/boot/dts/ti/k3-serdes.h
> index e6a036a4e70b..ef3606068140 100644
> --- a/arch/arm64/boot/dts/ti/k3-serdes.h
> +++ b/arch/arm64/boot/dts/ti/k3-serdes.h
> @@ -206,4 +206,7 @@
>  #define J722S_SERDES0_LANE0_USB			0x0
>  #define J722S_SERDES0_LANE0_QSGMII_LANE2	0x1
>  
> +#define J722S_SERDES1_LANE0_PCIE0_LANE0		0x0
> +#define J722S_SERDES1_LANE0_QSGMII_LANE1	0x1
> +

Maybe this one patch can deal with both USB and PCIE0 additions to this file
and could be moved earlier in the series.

>  #endif /* DTS_ARM64_TI_K3_SERDES_H */

-- 
cheers,
-roger