From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Parikshit Pareek <quic_ppareek@quicinc.com>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Andrew Halaney <ahalaney@redhat.com>,
Shazad Hussain <quic_shazhuss@quicinc.com>,
Brian Masney <bmasney@redhat.com>,
Johan Hovold <johan@kernel.org>
Subject: Re: [PATCH v9 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3)
Date: Wed, 16 Nov 2022 17:01:14 +0100 [thread overview]
Message-ID: <df407bc1-63af-c188-3ae2-622641abcbf6@linaro.org> (raw)
In-Reply-To: <20221116154932.17127-3-quic_ppareek@quicinc.com>
On 16/11/2022 16:49, Parikshit Pareek wrote:
> Introduce the Qualcomm SA8540P ride automotive platform, also known as
> Qdrive-3 development board.
>
> This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh
> regulators, debug UART, PMICs, remoteprocs and USB.
>
> The SA8540P ride contains four PM8450 PMICs. A separate DTSI file has
> been created for PMIC, so that it can be used for future SA8540P based
> boards.
>
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> Tested-by: Brian Masney <bmasney@redhat.com>
> Reviewed-by: Brian Masney <bmasney@redhat.com>
> Tested-by: Eric Chanudet <echanude@redhat.com>
> Reviewed-by: Eric Chanudet <echanude@redhat.com>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/pm8450a.dtsi | 77 ++++++++
> arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 219 ++++++++++++++++++++++
> 3 files changed, 297 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/pm8450a.dtsi
> create mode 100644 arch/arm64/boot/dts/qcom/sa8540p-ride.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index afe496a93f94..87a681f15643 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sa8540p-ride.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb
> diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/pm8450a.dtsi
> new file mode 100644
> index 000000000000..34fc72896761
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/pm8450a.dtsi
> @@ -0,0 +1,77 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2021, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2022, Linaro Limited
> + */
> +
> +#include <dt-bindings/spmi/spmi.h>
> +
> +&spmi_bus {
> + pm8450a: pmic@0 {
> + compatible = "qcom,pm8150", "qcom,spmi-pmic";
> + reg = <0x0 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + pm8450a_gpios: gpio@c000 {
> + compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> + reg = <0xc000>;
> + gpio-controller;
> + gpio-ranges = <&pm8450a_gpios 0 0 10>;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + pm8450c: pmic@4 {
> + compatible = "qcom,pm8150", "qcom,spmi-pmic";
> + reg = <0x4 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + pm8450c_gpios: gpio@c000 {
> + compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> + reg = <0xc000>;
> + gpio-controller;
> + gpio-ranges = <&pm8450c_gpios 0 0 10>;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + pm8450e: pmic@8 {
> + compatible = "qcom,pm8150", "qcom,spmi-pmic";
> + reg = <0x8 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + pm8450e_gpios: gpio@c000 {
> + compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> + reg = <0xc000>;
> + gpio-controller;
> + gpio-ranges = <&pm8450e_gpios 0 0 10>;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + pm8450g: pmic@c {
> + compatible = "qcom,pm8150", "qcom,spmi-pmic";
> + reg = <0xc SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + pm8450g_gpios: gpio@c000 {
> + compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
> + reg = <0xc000>;
> + gpio-controller;
> + gpio-ranges = <&pm8450g_gpios 0 0 10>;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> new file mode 100644
> index 000000000000..5262a7cc7fcd
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> @@ -0,0 +1,219 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2021, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2022, Linaro Limited
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +
> +#include "sa8540p.dtsi"
> +#include "pm8450a.dtsi"
> +
> +/ {
> + model = "Qualcomm SA8540P Ride";
> + compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
> +
> + aliases {
> + serial0 = &qup2_uart17;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
> +
> +&apps_rsc {
> + regulators-0 {
> + compatible = "qcom,pm8150-rpmh-regulators";
> + qcom,pmic-id = "a";
> +
> + vreg_l3a: ldo3 {
> + regulator-name = "vreg_l3a";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1208000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l5a: ldo5 {
> + regulator-name = "vreg_l5a";
> + regulator-min-microvolt = <912000>;
> + regulator-max-microvolt = <912000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l7a: ldo7 {
> + regulator-name = "vreg_l7a";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l13a: ldo13 {
> + regulator-name = "vreg_l13a";
> + regulator-min-microvolt = <3072000>;
> + regulator-max-microvolt = <3072000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> + };
> +
> + regulators-1 {
> + compatible = "qcom,pm8150-rpmh-regulators";
> + qcom,pmic-id = "c";
> +
> + vreg_l1c: ldo1 {
> + regulator-name = "vreg_l1c";
> + regulator-min-microvolt = <912000>;
> + regulator-max-microvolt = <912000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l2c: ldo2 {
> + regulator-name = "vreg_l2c";
> + regulator-min-microvolt = <3072000>;
> + regulator-max-microvolt = <3072000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l4c: ldo4 {
> + regulator-name = "vreg_l4c";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1208000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l6c: ldo6 {
> + regulator-name = "vreg_l6c";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> + RPMH_REGULATOR_MODE_HPM>;
> + regulator-allow-set-load;
> + };
> +
> + vreg_l7c: ldo7 {
> + regulator-name = "vreg_l7c";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l17c: ldo17 {
> + regulator-name = "vreg_l17c";
> + regulator-min-microvolt = <2504000>;
> + regulator-max-microvolt = <2504000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
> + RPMH_REGULATOR_MODE_HPM>;
> + regulator-allow-set-load;
> + };
> + };
> +
> + regulators-2 {
> + compatible = "qcom,pm8150-rpmh-regulators";
> + qcom,pmic-id = "g";
> +
> + vreg_l3g: ldo3 {
> + regulator-name = "vreg_l3g";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l7g: ldo7 {
> + regulator-name = "vreg_l7g";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l8g: ldo8 {
> + regulator-name = "vreg_l8g";
> + regulator-min-microvolt = <880000>;
> + regulator-max-microvolt = <880000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> + };
> +};
> +
> +&qup2 {
> + status = "okay";
> +};
> +
> +&qup2_uart17 {
> + compatible = "qcom,geni-debug-uart";
> + status = "okay";
> +};
> +
> +&remoteproc_nsp0 {
> + firmware-name = "qcom/sa8540p/cdsp.mbn";
> + status = "okay";
> +};
> +
> +&remoteproc_nsp1 {
> + firmware-name = "qcom/sa8540p/cdsp1.mbn";
> + status = "okay";
> +};
> +
> +&ufs_mem_hc {
> + reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
> +
> + vcc-supply = <&vreg_l17c>;
> + vcc-max-microamp = <800000>;
These -microamp properties do not exist upstream.
With that fixed:
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
> + vccq-supply = <&vreg_l6c>;
> + vccq-max-microamp = <900000>;
> +
> + status = "okay";
> +};
> +
> +&ufs_mem_phy {
> + vdda-phy-supply = <&vreg_l8g>;
> + vdda-pll-supply = <&vreg_l3g>;
> +
> + status = "okay";
> +};
> +
> +&usb_0 {
> + status = "okay";
> +};
> +
> +&usb_0_dwc3 {
> + dr_mode = "peripheral";
> +};
> +
> +&usb_0_hsphy {
> + vdda-pll-supply = <&vreg_l5a>;
> + vdda18-supply = <&vreg_l7a>;
> + vdda33-supply = <&vreg_l13a>;
> +
> + status = "okay";
> +};
> +
> +&usb_0_qmpphy {
> + vdda-phy-supply = <&vreg_l3a>;
> + vdda-pll-supply = <&vreg_l5a>;
> +
> + status = "okay";
> +};
> +
> +&usb_2_hsphy0 {
> + vdda-pll-supply = <&vreg_l5a>;
> + vdda18-supply = <&vreg_l7g>;
> + vdda33-supply = <&vreg_l13a>;
> +
> + status = "okay";
> +};
> +
> +&usb_2_qmpphy0 {
> + vdda-phy-supply = <&vreg_l3a>;
> + vdda-pll-supply = <&vreg_l5a>;
> +
> + status = "okay";
> +};
> +
> +&xo_board_clk {
> + clock-frequency = <38400000>;
> +};
next prev parent reply other threads:[~2022-11-16 16:01 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-16 15:49 [PATCH v9 0/2] arm64: dts: qcom: add dts for sa8540p-ride board Parikshit Pareek
2022-11-16 15:49 ` [PATCH v9 1/2] dt-bindings: arm: qcom: Document additional sa8540p device Parikshit Pareek
2022-11-16 15:49 ` [PATCH v9 2/2] arm64: dts: qcom: add SA8540P ride(Qdrive-3) Parikshit Pareek
2022-11-16 15:59 ` Johan Hovold
2022-11-16 16:01 ` Konrad Dybcio [this message]
2022-11-16 15:57 ` [PATCH v9 0/2] arm64: dts: qcom: add dts for sa8540p-ride board Johan Hovold
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=df407bc1-63af-c188-3ae2-622641abcbf6@linaro.org \
--to=konrad.dybcio@linaro.org \
--cc=agross@kernel.org \
--cc=ahalaney@redhat.com \
--cc=andersson@kernel.org \
--cc=bmasney@redhat.com \
--cc=devicetree@vger.kernel.org \
--cc=johan@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=quic_ppareek@quicinc.com \
--cc=quic_shazhuss@quicinc.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox