From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-177.mta0.migadu.com (out-177.mta0.migadu.com [91.218.175.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A4803890F7 for ; Wed, 24 Jun 2026 06:55:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.177 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782284149; cv=none; b=NDSRlC4/mSJmHRv2XRy64coUBn66+pXdLnhuOmqYFeA4PluNPRucWMEjiNuAkIZTaRFkyWpvIQij2l24ijesjnbSpwkXUDo0GkroRD/MXo1xA2kLraDB6mwljEy8EsrHBtMyJqOI/U71gJnygwdZHe0JQc2HHaS3xbaru9o2fUw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782284149; c=relaxed/simple; bh=rLH9ynL6Uvxn7RnSmUHLRZRTqjWpsodZDL+nLrHffhY=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=QZXTtBU6MzajneV+2v7ykV1daTdJcmXOGqIT+oJgkxCoeHd1EQIEQMIauUvDw8+OUbPsN+nCaFSPQDlgr+QrNAmnGclyyPIWHkQmwrbNddfcKbYiTqYbHxnEF0A2DMvfRqalBp/3wSSDarJjvh8pSISYyglki+YXhFbQWSoIRNE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=YcHVNIIQ; arc=none smtp.client-ip=91.218.175.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="YcHVNIIQ" Message-ID: DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1782284135; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yWm8hwbOHYEuIVgePKE1QjEJreKex9TPU9yjx6MzZcc=; b=YcHVNIIQIPlkM4Otj/PcpwiswIuKazAwMKCk9ChENUfKCwBT6Gh/wiQr0oNjKrv1nipBGG ct24V6l0dxWtjw8Rc02pGLqDchRSQLB/o2NKzC0FKFohLycg4yJTIH0RPJbw0uwB5DODaP v0GqAVxtEwq+zjEoS/Pic5q81ZOQ9Ic= Date: Tue, 23 Jun 2026 23:55:28 -0700 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH v6 04/21] RISC-V: Define indirect CSR access helpers To: Charlie Jenkins Cc: James Clark , Rob Herring , Arnaldo Carvalho de Melo , Jiri Olsa , Will Deacon , Mark Rutland , Anup Patel , Namhyung Kim , Paul Walmsley , Krzysztof Kozlowski , Ian Rogers , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Conor Dooley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20260608-counter_delegation-v6-0-285b72ed65a9@meta.com> <20260608-counter_delegation-v6-4-285b72ed65a9@meta.com> Content-Language: en-US X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Atish Patra In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Migadu-Flow: FLOW_OUT On 6/21/26 11:42 PM, Charlie Jenkins wrote: > On Mon, Jun 08, 2026 at 11:01:18PM -0700, Atish Patra wrote: >> From: Atish Patra >> >> The indriect CSR requires multiple instructions to read/write CSR. > indirect > >> Add a few helper functions for ease of usage. >> >> Signed-off-by: Atish Patra >> --- >> arch/riscv/include/asm/csr_ind.h | 44 ++++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 44 insertions(+) >> >> diff --git a/arch/riscv/include/asm/csr_ind.h b/arch/riscv/include/asm/csr_ind.h >> new file mode 100644 >> index 000000000000..6fd7d44dc640 >> --- /dev/null >> +++ b/arch/riscv/include/asm/csr_ind.h >> @@ -0,0 +1,44 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> +/* >> + * Copyright (C) 2024 Rivos Inc. > I don't think it makes sense to introduce this copyright in new commits. Yeah. I will update these. > - Charlie > >> + */ >> + >> +#ifndef _ASM_RISCV_CSR_IND_H >> +#define _ASM_RISCV_CSR_IND_H >> + >> +#include >> + >> +#include >> + >> +#define csr_ind_read(iregcsr, iselbase, iseloff) ({ \ >> + unsigned long __value = 0; \ >> + unsigned long __flags; \ >> + local_irq_save(__flags); \ >> + csr_write(CSR_ISELECT, (iselbase) + (iseloff)); \ >> + __value = csr_read(iregcsr); \ >> + local_irq_restore(__flags); \ >> + __value; \ >> +}) >> + >> +#define csr_ind_write(iregcsr, iselbase, iseloff, value) ({ \ >> + unsigned long __flags; \ >> + local_irq_save(__flags); \ >> + csr_write(CSR_ISELECT, (iselbase) + (iseloff)); \ >> + csr_write(iregcsr, (value)); \ >> + local_irq_restore(__flags); \ >> +}) >> + >> +#define csr_ind_warl(iregcsr, iselbase, iseloff, warl_val) ({ \ >> + unsigned long __old_val = 0, __value = 0; \ >> + unsigned long __flags; \ >> + local_irq_save(__flags); \ >> + csr_write(CSR_ISELECT, (iselbase) + (iseloff)); \ >> + __old_val = csr_read(iregcsr); \ >> + csr_write(iregcsr, (warl_val)); \ >> + __value = csr_read(iregcsr); \ >> + csr_write(iregcsr, __old_val); \ >> + local_irq_restore(__flags); \ >> + __value; \ >> +}) >> + >> +#endif >> >> -- >> 2.53.0-Meta >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv >>