Re: [RFC PATCH 03/12] dt-bindings: clock: qcom,mmcc: define clocks/clock-names for APQ8084

[Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>]

On 27/12/2022 02:32, Dmitry Baryshkov wrote:
> Define clock/clock-names properties of the MMCC device node to be used
> on APQ8084 platform.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  .../devicetree/bindings/clock/qcom,mmcc.yaml  | 40 +++++++++++++++++++
>  1 file changed, 40 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
> index e6d17426e903..fd926df80c64 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
> @@ -137,6 +137,46 @@ allOf:
>              - const: edp_link_clk
>              - const: edp_vco_div
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,mmcc-apq8084
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: Board XO source
> +            - description: Board sleep source
> +            - description: MMSS GPLL0 voted clock
> +            - description: GPLL0 clock
> +            - description: GPLL0 voted clock
> +            - description: GPLL1 clock
> +            - description: DSI phy instance 0 dsi clock
> +            - description: DSI phy instance 0 byte clock
> +            - description: DSI phy instance 1 dsi clock
> +            - description: DSI phy instance 1 byte clock
> +            - description: HDMI phy PLL clock
> +            - description: eDP phy PLL link clock
> +            - description: eDP phy PLL vco clock

This looks like exceeding constraints set in top-level (max 10).

Best regards,
Krzysztof