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Mon, 17 Feb 2025 01:10:38 -0800 (PST) Message-ID: Date: Mon, 17 Feb 2025 11:10:36 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 13/16] ARM: dts: microchip: sam9x60: Add OTPC node To: Alexander Dahl Cc: Nicolas Ferre , Ryan Wanner , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley References: <20250210164506.495747-1-ada@thorsis.com> <20250211065304.5019-1-ada@thorsis.com> From: Claudiu Beznea Content-Language: en-US In-Reply-To: <20250211065304.5019-1-ada@thorsis.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11.02.2025 08:53, Alexander Dahl wrote: > The One-Time Programmable (OTP) Memory Controller (OTPC) is the secure > interface between the system and the OTP memory. It also features the > Unique Product ID (UID) registers containing a unique serial number. > > See datasheet (DS60001579G) sections "7. Memories" and "23. OTP Memory > Controller (OTPC)" for reference. > > Signed-off-by: Alexander Dahl > --- > > Notes: > v2: > - squashed with patch adding the clock properties > > arch/arm/boot/dts/microchip/sam9x60.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi > index 1724b79967a17..af859f0b83a0f 100644 > --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi > +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi > @@ -15,6 +15,7 @@ > #include > #include > #include > +#include This is not needed, atm. > > / { > #address-cells = <1>; > @@ -157,6 +158,15 @@ sdmmc1: sdio-host@90000000 { > status = "disabled"; > }; > > + otpc: efuse@eff00000 { > + compatible = "microchip,sam9x60-otpc", "syscon"; > + reg = <0xeff00000 0xec>; > + #address-cells = <1>; > + #size-cells = <1>; > + clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_MAIN_RC>, <&pmc PMC_TYPE_PERIPHERAL 46>; > + clock-names = "main_rc_osc", "otpc_clk"; > + }; > + > apb { > compatible = "simple-bus"; > #address-cells = <1>;