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From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Georgi Djakov <quic_c_gdjako@quicinc.com>,
	robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	conor+dt@kernel.org, will@kernel.org, robin.murphy@arm.com,
	joro@8bytes.org
Cc: devicetree@vger.kernel.org, andersson@kernel.org,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	quic_cgoldswo@quicinc.com, quic_sukadev@quicinc.com,
	quic_pdaly@quicinc.com, quic_sudaraja@quicinc.com,
	djakov@kernel.org
Subject: Re: [PATCH 1/6] dt-bindings: iommu: Add Translation Buffer Unit bindings
Date: Thu, 19 Oct 2023 13:12:02 +0200	[thread overview]
Message-ID: <e084e2f4-de2c-4850-a7b7-8b3b4a50c9b5@linaro.org> (raw)
In-Reply-To: <20231019021923.13939-2-quic_c_gdjako@quicinc.com>



On 10/19/23 04:19, Georgi Djakov wrote:
> The "apps_smmu" on the Qualcomm sdm845 platform is an implementation
> of the ARM SMMU-500, that consists of a single TCU (Translation Control
> Unit) and multiple TBUs (Translation Buffer Units). The TCU is already
> being described in the ARM SMMU DT schema. Add also bindings for the
> TBUs so that we can describe their properties.
> 
> In this DT schema, the TBUs are modelled as a child devices of the TCU
> and each of them is described with it's own resources such as clocks,
> power domains, interconnects etc.
> 
> Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
> ---
>   .../devicetree/bindings/iommu/arm,smmu.yaml   | 13 ++++
>   .../bindings/iommu/qcom,qsmmuv500-tbu.yaml    | 67 +++++++++++++++++++
>   2 files changed, 80 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/iommu/qcom,qsmmuv500-tbu.yaml
> 
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index cf29ab10501c..afc323b4bbc5 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -230,6 +230,19 @@ properties:
>         enabled for any given device.
>       $ref: /schemas/types.yaml#/definitions/phandle
>   
> +  '#address-cells':
> +    const: 2
> +
> +  '#size-cells':
> +    const: 2
> +
> +  ranges: true
> +
> +patternProperties:
> +  "^tbu@[0-9a-f]+$":
> +    $ref: qcom,qsmmuv500-tbu.yaml
> +    description: The SMMU may include Translation Buffer Units (TBU) as subnodes
> +
>   required:
>     - compatible
>     - reg
> diff --git a/Documentation/devicetree/bindings/iommu/qcom,qsmmuv500-tbu.yaml b/Documentation/devicetree/bindings/iommu/qcom,qsmmuv500-tbu.yaml
> new file mode 100644
> index 000000000000..4baba7397e90
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iommu/qcom,qsmmuv500-tbu.yaml
> @@ -0,0 +1,67 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iommu/qcom,qsmmuv500-tbu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm TBU (Translation Buffer Unit)
> +
> +maintainers:
> +  - Georgi Djakov <quic_c_gdjako@quicinc.com>
> +
> +description:
> +  TBU nodes represent Translation Buffer Units in an ARM SMMU. Each TBU node
> +  should be a child node of the SMMU in the device tree.
description: refers to the hardware, so it should say what this IP
is, what it does and things like that

> +
> +properties:
> +  compatible:
> +    enum:
> +      - qcom,qsmmuv500-tbu
Should we expect this list to grow?

> +
> +  reg:
> +    items:
> +      - description: Address and size of the TBU's register space.
> +
> +  reg-names:
> +    items:
> +      - const: base
> +
> +  clocks:
> +    maxItems: 1
> +
> +  interconnects:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  qcom,stream-id-range:
> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> +    description: Stream ID range (address and size) that is assigned by the TBU
I believe you need to size-limit this.

If it's only supposed to be a single tuple, perhaps it could be said
explicitly.

> +
> +required:
> +  - compatible
> +  - reg
> +  - interconnects
> +  - qcom,stream-id-range
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> +    #include <dt-bindings/interconnect/qcom,sdm845.h>
> +    #include <dt-bindings/power/qcom-rpmpd.h>
> +
> +
2 newlines seems excessive

> +    tbu@150e1000 {
> +        compatible = "qcom,qsmmuv500-tbu";
> +        reg = <0x150e1000 0x1000>;
> +        reg-names = "base";
> +        clocks = <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
> +        power-domains = <&gcc HLOS1_VOTE_AGGRE_NOC_MMU_PCIE_TBU_GDSC>;
> +        interconnects = <&system_noc MASTER_GNOC_SNOC 0 &config_noc SLAVE_IMEM_CFG 0>;
> +        qcom,stream-id-range = <0x1c00 0x400>;
> +    };
I think it would be beneficial if this tbu was a child of some smmu node
like it's intended to be.

Konrad

  reply	other threads:[~2023-10-19 11:12 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-19  2:19 [PATCH 0/6] Add support for Translation Buffer Units Georgi Djakov
2023-10-19  2:19 ` [PATCH 1/6] dt-bindings: iommu: Add Translation Buffer Unit bindings Georgi Djakov
2023-10-19 11:12   ` Konrad Dybcio [this message]
2023-10-24 18:42   ` Rob Herring
2023-10-24 22:26     ` Robin Murphy
2023-10-26 17:58       ` Georgi Djakov
2023-10-19  2:19 ` [PATCH 2/6] iommu/arm-smmu-qcom: Add support for TBUs Georgi Djakov
2023-10-19 11:13   ` Konrad Dybcio
2023-10-19  2:19 ` [PATCH 3/6] iommu/arm-smmu-qcom: Add Qualcomm TBU driver Georgi Djakov
2023-10-21 21:05   ` Bjorn Andersson
2023-11-18  2:26     ` Georgi Djakov
2023-10-26 15:25   ` kernel test robot
2023-10-19  2:19 ` [PATCH 4/6] iommu/arm-smmu: Allow using a threaded handler for context interrupts Georgi Djakov
2023-10-19  2:19 ` [PATCH 5/6] iommu/arm-smmu-qcom: Use a custom context fault handler for sdm845 Georgi Djakov
2023-10-19  2:19 ` [PATCH 6/6] arm64: dts: qcom: sdm845: Add DT nodes for the TBUs Georgi Djakov

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