From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-m32108.qiye.163.com (mail-m32108.qiye.163.com [220.197.32.108]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDA2319E97F; Tue, 24 Feb 2026 02:08:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.32.108 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771898904; cv=none; b=LuYjaFNwpiGhgQXS2pC7RvVnEvRiXwMXMXbX0nEhkYT8VREi7nxwHkbW9RocHmPp2IlpIz3wPhucqBtElNWnY2cRd7oC+xHOIUZ6YQ2aPR2oigy+mJJIEPFti72ZFpEHKvkyY7/3y8XPJa3L1pSMLGLAql8xS2x+Zg/Dc2juoxw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771898904; c=relaxed/simple; bh=JQzQNaW8wVS2tK/GeYgPpo5RHMXOBYjCt3d20K4coM0=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=jwZMI2y8UeNyLrO4AlRzBLBdU4MWcySgSk719Pjioa0jROKrwnmMZdUe/6SXK2EpB4omfOXM7OcBaYHGSYFT24kHCzOtP0Q09ThbERIvQOtNr6NtyuL5VBPbr+klI0HE25lcm1R1WGalYea9JbsZ4gc6o+71ieXNga1Mu1WzRIU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=YLGrRVTY; arc=none smtp.client-ip=220.197.32.108 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="YLGrRVTY" Received: from [127.0.0.1] (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 34bd766c9; Tue, 24 Feb 2026 10:08:16 +0800 (GMT+08:00) Message-ID: Date: Tue, 24 Feb 2026 10:08:00 +0800 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Problematic understanding of phy-mode in Rockchip DWMAC driver To: Diederik de Haas , "Russell King (Oracle)" , Andrew Lunn Cc: Yao Zi , Heiko Stuebner , Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , netdev@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org References: Content-Language: en-US From: Chaoyi Chen In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-HM-Tid: 0a9c8d677e7303abkunm282acd41e78e52 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZQhpDT1ZCQh1LQxlLGkkaQ05WFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0 hVSktLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=YLGrRVTYXYwJ78iiZ/DQI2fHLRiYr025TGHy3A3AHdE80kecqRFIsnllhhGoByhzUL5aPHOlAcb34VOOcpOOk4xagSKOFFoHtm5VN9dMan8jLwXRHM9lMM64M1RQFiG5po0AiS8Z7/N/zQZ4T0iovsY4S6BMJwQHXcrVVmbcPP4=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=7X1iUhAUWuFURylZjRz/UYuilzjOVBho6gFijhNRoZI=; h=date:mime-version:subject:message-id:from; Hi all, On 2/17/2026 1:21 AM, Diederik de Haas wrote: > On Mon Feb 16, 2026 at 4:00 PM CET, Russell King (Oracle) wrote: >> On Mon, Feb 16, 2026 at 02:57:48AM +0100, Andrew Lunn wrote: >>> On Sat, Feb 14, 2026 at 07:02:08PM +0000, Russell King (Oracle) wrote: >>>> On Sat, Feb 14, 2026 at 05:50:15PM +0100, Andrew Lunn wrote: >>>>> Rockchip have recently started adding support for a new version, and >>>>> appear to of listened to what we have been saying. So it could be the >>>>> next generation of chips get this correct. >>>> >>>> Have you seen any proposed code from Rockchip for their new scheme? >>> >>> There was a patch, including a rather odd formulae to convert register >>> value to delay. I gave some feedback, but it has been silence >>> afterwards. >> >> Searching lore's netdev archive doesn't seem to bring anything up. > > https://patch.msgid.link/b25d6eb2-e105-4060-86fa-c1a06396ca92@lunn.ch/ > I am the author of this patch series. My understanding is that "rgmii-id" should be adopted first, and for any delays that may need to be introduced, they should be implemented in the PHY rather than in the GMAC, although I did try to do so. Did I miss something? -- Best, Chaoyi