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Wed, 21 Oct 2026 04:23:56 -0700 (PDT) Received: from [10.204.78.119] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ad811c515fsm3765832a91.9.2026.10.21.04.23.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Oct 2026 04:23:56 -0700 (PDT) Message-ID: Date: Wed, 21 Oct 2026 16:53:46 +0530 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 07/13] phy: qcom: edp: Add Nord-specific register offsets To: Dmitry Baryshkov Cc: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Kuogee Hsieh , Shawn Guo , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Ritesh Kumar , Mahadevan P References: <20261012-nord-drv-dt-v2-0-a2ab9af954d2@oss.qualcomm.com> <20261012-nord-drv-dt-v2-7-a2ab9af954d2@oss.qualcomm.com> Content-Language: en-GB From: Nabige Aala In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIxMDA0NSBTYWx0ZWRfX+JRrC5ayzSvR 5gKldrHCNTSxde3wZa3rR+znqcpZNdALtEaY9QOBi2Sv7QxXovkqaKGcA4nDT9OubweJTcqkOl6 marwh97ZBw4UCvoH+1YQ+8kVBAAjU2ej83Ho+lF3VxBXy9SEI1avxl268MJQYjg5hpg0wk3kYRv SY8EM0zgvo10fRxykF5uni93x06coGdajkYplKrSQA3HGH36EL904Lnou/9SFuUbIj8XuLIco9x KEChybm85jfWKnafP6ws1KJ0dlmzx55euHMTCEb+EQoJNDjbTO2GR7X4WPFMM9xefNq4AZRZUd8 XemirRuoQ6FLwh6Tg20xgXUi/0OjXzgJ8/8KYxTTEv7B5kJP3xYTyibIQQWl0kwg7Q7imp4kgYW 9YanIJ47oldbrVFe8Wq2s0XQG5I7CrDB4mNAfcQyqjxdcP3DUE2X00JNGcTG6m1If5YIVPomljU yWa5oZb9yDxPntMOhXQ== X-Proofpoint-GUID: j-I3xVk2hi_EYkBRRoY3eUPtaQ9gmW8Q X-Proofpoint-ORIG-GUID: j-I3xVk2hi_EYkBRRoY3eUPtaQ9gmW8Q X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIxMDA0NSBTYWx0ZWRfXzORjZdrywGl2 j0r9yIBS0CGu6pH1i/Q3FPk0WotvZ74cU/SvCW5HEktXxI+YVBz/U+QGWFLsC8L8NS3fjWIBnt5 qh52jsAIGHNbcBF1dUUyDPvzJWx7ppI= X-Authority-Analysis: v=2.4 cv=HrTjiETS c=1 sm=1 tr=0 ts=6ad8a0ce cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=YZ6MeopCirwGMcWCqvsA:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-21_03,2026-10-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 impostorscore=0 suspectscore=0 bulkscore=0 adultscore=0 priorityscore=1501 spamscore=0 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610210045 On 10/13/2026 3:49 PM, Dmitry Baryshkov wrote: > On Mon, Oct 12, 2026 at 07:02:17PM +0530, Nabige Aala wrote: >> From: Ritesh Kumar >> >> Nord relocates several DP PHY and QSERDES v8 COM registers relative >> to existing SoCs. > Why? > >> Add Nord-specific defines for the relocated and >> new-only registers in phy-qcom-qmp-qserdes-dp-com-v8.h and >> phy-qcom-edp.c so Nord sequences can reference them by name. > Typically we don't do it, If something differs, it should get its own > set of headers, describing all necessary offsets (especially for the > QSERDES). Otherwise it's not obvious if other regs (without the _NORD > counterpart) are valid or not. Ack, Are you suggesting that we introduce a new header file for QSERDES? If so, we're currently using the v8 header. What naming convention should we follow for the new header file? > >> Assisted-by: LLM >> Signed-off-by: Ritesh Kumar >> Signed-off-by: Nabige Aala >> --- >> drivers/phy/qualcomm/phy-qcom-edp.c | 7 +++++++ >> drivers/phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h | 3 +++ >> 2 files changed, 10 insertions(+) >> >> diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c >> index a3c893f72908..d5c6835b6c70 100644 >> --- a/drivers/phy/qualcomm/phy-qcom-edp.c >> +++ b/drivers/phy/qualcomm/phy-qcom-edp.c >> @@ -42,8 +42,15 @@ >> #define DP_PHY_VCO_DIV 0x0074 >> #define DP_PHY_TX0_TX1_LANE_CTL 0x007c >> #define DP_PHY_TX2_TX3_LANE_CTL 0x00a0 >> +#define DP_PHY_TX2_TX3_LANE_CTL_NORD 0x00c0 >> >> #define DP_PHY_STATUS 0x00e0 >> +#define DP_PHY_STATUS_NORD 0x0110 >> +#define DP_PHY_LDO_CFG_NORD 0x00f0 >> + >> +#define DP_PHY_TX_LN0_DRV_LVL_NORD 0x00e4 >> +#define DP_PHY_TX_LN1_DRV_LVL_NORD 0x00e8 >> +#define TXn_TX_BAND_NORD 0x0024 >> >> /* LANE_TXn registers */ >> #define TXn_CLKBUF_ENABLE 0x0000 > I'd suggest adding these together with the actual users. Ack, I will update in the next revision. Thanks, Nabige > >> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h >> index 93edabb830af..008b17222a8d 100644 >> --- a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h >> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h >> @@ -48,5 +48,8 @@ >> #define DP_QSERDES_V8_COM_CLK_FWD_CONFIG_1 0x2f4 >> #define DP_QSERDES_V8_COM_CMN_STATUS 0x314 >> #define DP_QSERDES_V8_COM_C_READY_STATUS 0x33c >> +#define DP_QSERDES_V8_COM_SVS_MODE_CLK_SEL_NORD 0x17c >> +#define DP_QSERDES_V8_COM_CMN_STATUS_NORD 0x1d0 >> +#define DP_QSERDES_V8_COM_C_READY_STATUS_NORD 0x1f8 >> >> #endif >> >> -- >> 2.34.1 >>