Re: [PATCH 05/10] dt-bindings: display: imx: Add i.MX8qxp Display Controller

[Krzysztof Kozlowski <krzk@kernel.org>]

On 05/07/2024 11:09, Liu Ying wrote:
> i.MX8qxp Display Controller(DC) is comprised of three main components that
> include a blit engine for 2D graphics accelerations, display controller for
> display output processing, as well as a command sequencer.
> 
> Signed-off-by: Liu Ying <victor.liu@nxp.com>
> ---
>  .../bindings/display/imx/fsl,imx8qxp-dc.yaml  | 243 ++++++++++++++++++
>  1 file changed, 243 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc.yaml
> new file mode 100644
> index 000000000000..a2ad280d2839
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc.yaml
> @@ -0,0 +1,243 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8qxp Display Controller
> +
> +description: |
> +  The Freescale i.MX8qxp Display Controller(DC) is comprised of three main
> +  components that include a blit engine for 2D graphics accelerations, display
> +  controller for display output processing, as well as a command sequencer.
> +
> +                                  Display buffers              Source buffers
> +                                 (AXI read master)            (AXI read master)
> +                                  | .......... |                  | | |
> +      +---------------------------+------------+------------------+-+-+------+
> +      | Display Controller (DC)   | .......... |                  | | |      |
> +      |                           |            |                  | | |      |
> +      |   @@@@@@@@@@@  +----------+------------+------------+     | | |      |
> +  A   |  | Command   | |          V            V            |     | | |      |
> +  X <-+->| Sequencer | |    @@@@@@@@@@@@@@@@@@@@@@@@@@@@    |     V V V      |
> +  I   |  | (AXI CLK) | |   |                            |   |   @@@@@@@@@@   |
> +      |   @@@@@@@@@@@  |   |       Pixel Engine         |   |  |          |  |
> +      |       |        |   |         (AXI CLK)          |   |  |          |  |
> +      |       V        |    @@@@@@@@@@@@@@@@@@@@@@@@@@@@    |  |          |  |
> +  A   |   ***********  |       |   |            |   |       |  |   Blit   |  |
> +  H <-+->| Configure | |       V   V            V   V       |  |  Engine  |  |
> +  B   |  | (CFG CLK) | |    00000000000      11111111111    |  | (AXI CLK)|  |
> +      |   ***********  |   |  Display  |    |  Display  |   |  |          |  |
> +      |                |   |  Engine   |    |  Engine   |   |  |          |  |
> +      |                |   | (Disp CLK)|    | (Disp CLK)|   |  |          |  |
> +      |   @@@@@@@@@@@  |    00000000000      11111111111    |   @@@@@@@@@@   |
> +  I   |  |  Common   | |         |                |         |       |        |
> +  R <-+--|  Control  | |         |    Display     |         |       |        |
> +  Q   |  | (AXI CLK) | |         |   Controller   |         |       |        |
> +      |   @@@@@@@@@@@  +------------------------------------+       |        |
> +      |                          |                |       ^         |        |
> +      +--------------------------+----------------+-------+---------+--------+
> +              ^                  |                |       |         |
> +              |                  V                V       |         V
> +       Clocks & Resets        Display          Display  Panic   Destination
> +                              Output0          Output1 Control    buffer
> +                                                              (AXI write master)
> +
> +maintainers:
> +  - Liu Ying <victor.liu@nxp.com>
> +
> +properties:
> +  compatible:
> +    const: fsl,imx8qxp-dc
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  resets:
> +    maxItems: 2
> +
> +  reset-names:
> +    items:
> +      - const: axi
> +      - const: cfg
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 1
> +
> +  ranges: true
> +
> +patternProperties:
> +  "^axi-performance-counter@[0-9a-f]+$":

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation


Is this a PMU?

> +    type: object
> +    additionalProperties: true
> +
> +    properties:
> +      compatible:
> +        const: fsl,imx8qxp-dc-axi-performance-counter
> +


> +        pixel-engine@56180800 {
> +            compatible = "fsl,imx8qxp-dc-pixel-engine";
> +            reg = <0x56180800 0xac00>;
> +            clocks = <&dc0_lpcg IMX_LPCG_CLK_5>;
> +            #address-cells = <1>;
> +            #size-cells = <1>;
> +            ranges;
> +        };
> +
> +        display-engine@5618b400 {
> +            compatible = "fsl,imx8qxp-dc-display-engine";
> +            reg = <0x5618b400 0x14>, <0x5618b800 0x1c00>;
> +            reg-names = "top", "cfg";
> +            interrupt-parent = <&dc0_intc>;

Where is this node?

I think this proves that interrupt controller is part of the display
controller.

Best regards,
Krzysztof