From: Johan Jonker <jbx6244@gmail.com>
To: Peter Geis <pgwipeout@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/3] arm64: dts: rockchip: add Quartz64-A pmu_io_domains
Date: Thu, 27 Jan 2022 06:57:00 +0100 [thread overview]
Message-ID: <e2479729-154a-122f-f2e0-89b62ffe2c8d@gmail.com> (raw)
In-Reply-To: <20220127010023.3169415-3-pgwipeout@gmail.com>
Hi Peter,
On 1/27/22 02:00, Peter Geis wrote:
> Several io power domains on the Quartz64-A operate at 1.8v.
> Add the pmu_io_domains definition to enable support for this.
> This permits the enablement of the following features:
> sdio - wifi support
> sdhci - mmc-hs200-1_8v
>
> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> ---
> arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> index d9eb92d59099..33c2c18caaa9 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> @@ -482,6 +482,19 @@ vcc_sd_h: vcc-sd-h {
> };
> };
>
https://files.pine64.org/doc/quartz64/Quartz64_model-A_schematic_v2.0_20210427.pdf
Could you check with the IO Power Domain Map?
> +&pmu_io_domains {
> + pmuio1-supply = <&vcc3v3_pmu>;
VCC3V3_PMU
> + pmuio2-supply = <&vcc3v3_pmu>;
VCC3V3_PMU
> + vccio1-supply = <&vccio_acodec>;
VCCIO_ACODEC
> + vccio2-supply = <&vcc_1v8>;
VCC_1V8
> + vccio3-supply = <&vccio_sd>;
VCCIO_SD
> + vccio4-supply = <&vcc_1v8>;
==> VCC1V8_PMU
> + vccio5-supply = <&vcc_3v3>;
==> VCC_1V8
> + vccio6-supply = <&vcc1v8_dvp>;
VCC1V8_DVP
> + vccio7-supply = <&vcc_3v3>;
VCC_3V3
> + status = "okay";
> +};
> +
> &sdhci {
> bus-width = <8>;
> mmc-hs200-1_8v;
next prev parent reply other threads:[~2022-01-27 5:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-27 1:00 [PATCH 0/3] Quartz64-A fixes and enablement from 5.17-rc1 Peter Geis
2022-01-27 1:00 ` [PATCH 1/3] arm64: dts: rockchip: fix Quartz64-A ddr regulator voltage Peter Geis
2022-01-27 1:00 ` [PATCH 2/3] arm64: dts: rockchip: add Quartz64-A pmu_io_domains Peter Geis
2022-01-27 5:57 ` Johan Jonker [this message]
2022-01-27 9:52 ` Peter Geis
2022-01-27 1:00 ` [PATCH 3/3] arm64: dts: rockchip: add Quartz64-A sdmmc1 node Peter Geis
2022-01-27 6:18 ` Johan Jonker
2022-01-27 9:55 ` Peter Geis
2022-01-27 10:15 ` Heiko Stübner
2022-01-27 23:32 ` Peter Geis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e2479729-154a-122f-f2e0-89b62ffe2c8d@gmail.com \
--to=jbx6244@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=pgwipeout@gmail.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).