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From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: Kevin Tung <kevin.tung.openbmc@gmail.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
	devicetree@vger.kernel.org,
		linux-arm-kernel@lists.infradead.org,
	linux-aspeed@lists.ozlabs.org, 	linux-kernel@vger.kernel.org,
	Amithash Prasasd <amithash@meta.com>,
	Kevin Tung	 <Kevin.Tung@quantatw.com>,
	Ken Chen <Ken.Chen@quantatw.com>,
	Leo Yang	 <Leo-Yang@quantatw.com>,
	Jackson Liu <Jackson.Liu@quantatw.com>,
	Daniel Hsu	 <Daniel-Hsu@quantatw.com>
Subject: Re: [PATCH v5 3/8] ARM: dts: aspeed: yosemite5: Add new SGPIO line names and rename signal
Date: Thu, 26 Mar 2026 16:40:10 +1030	[thread overview]
Message-ID: <e24ec25ff7d731cf6ca094028b1336dacd01ac9c.camel@codeconstruct.com.au> (raw)
In-Reply-To: <CABh9gBe2BcgnONwx=cmcOAsT15HgVGjxSChgFMvckTAW_8JfMQ@mail.gmail.com>

Hi Kevin,

On Mon, 2026-03-09 at 11:34 -0700, Kevin Tung wrote:
> > Broadly, it feels a lot like you're revising platform designs, then
> > trying to make the one devicetree fit the current design, and are not
> > explicitly communicating that this is what you're doing.
> > 
> > If that _is_ what you're doing, then we can come up with much better
> > schemes to handle it that aren't a constant stream of compatibility
> > breaks.
> > 
> > I need you to engage with this concern.
> > 
> Thanks for your feedback. I realize there may be a lack of knowledge
> on my side regarding the best practices here.
> Could you kindly guide me on how we might implement a better approach
> that avoids a constant stream of compatibility breaks?
> I’d like to ensure we handle this correctly and align with the
> expected workflow.

Sure, see the reply I just sent here:

https://lore.kernel.org/all/d7794f74b26bbc1ee0a70e39c5671acc018f80eb.camel@codeconstruct.com.au/

> 
> > From inspection, I only find patches 1, 4 and 7 of this series to be
> > something I'd consider applying without further discussion.
> > 
> Got it. Should I split patches 1, 4, and 7 into a separate series?
> This would keep the current series shorter by excluding items that
> don’t require further discussion.
> 

I am okay with that, so long as it makes sense in the context of the
discussion linked above.

Andrew

  reply	other threads:[~2026-03-26  6:10 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-23 11:17 [PATCH v5 0/8] Revise Meta Yosemite5 devicetree Kevin Tung
2026-02-23 11:17 ` [PATCH v5 1/8] ARM: dts: aspeed: yosemite5: Increase i2c4/i2c12 bus speed to 400 kHz Kevin Tung
2026-02-23 11:17 ` [PATCH v5 2/8] ARM: dts: aspeed: yosemite5: Remove ambiguous power monitor DTS nodes Kevin Tung
2026-03-04  2:41   ` Andrew Jeffery
2026-03-09 18:41     ` Kevin Tung
2026-03-26  6:07       ` Andrew Jeffery
2026-02-23 11:17 ` [PATCH v5 3/8] ARM: dts: aspeed: yosemite5: Add new SGPIO line names and rename signal Kevin Tung
2026-03-04  2:40   ` Andrew Jeffery
2026-03-09 18:34     ` Kevin Tung
2026-03-26  6:10       ` Andrew Jeffery [this message]
2026-02-23 11:17 ` [PATCH v5 4/8] ARM: dts: aspeed: yosemite5: Add IPMB node for OCP debug card Kevin Tung
2026-02-23 11:17 ` [PATCH v5 5/8] ARM: dts: aspeed: yosemite5: Correct power monitor shunt resistor Kevin Tung
2026-02-23 11:17 ` [PATCH v5 6/8] ARM: dts: aspeed: yosemite5: Add power distribution board IO expanders Kevin Tung
2026-02-23 11:17 ` [PATCH v5 7/8] ARM: dts: aspeed: yosemite5: Add debug card bypass GPIO Kevin Tung
2026-02-23 11:17 ` [PATCH v5 8/8] ARM: dts: aspeed: yosemite5: Fix host0-ready and add POST end GPIO Kevin Tung

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