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	id 1uK2uc-00E78z-Uq; Wed, 28 May 2025 00:36:46 +0200
Date: Wed, 28 May 2025 00:36:46 +0200
From: Andrew Lunn <andrew@lunn.ch>
To: Christian Marangi <ansuelsmth@gmail.com>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	Philipp Zabel <p.zabel@pengutronix.de>, netdev@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [net-next RFC PATCH 2/2] net: mdio: Add MDIO bus controller for
 Airoha AN7583
Message-ID: <e289d26e-9453-45f5-bfa6-f53f9e4647af@lunn.ch>
References: <20250527213503.12010-1-ansuelsmth@gmail.com>
 <20250527213503.12010-2-ansuelsmth@gmail.com>
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> +#define AN7583_MDIO_PHY				0xd4
> +#define   AN7583_MDIO1_SPEED_MODE		BIT(11)
> +#define   AN7583_MDIO0_SPEED_MODE		BIT(10)

Is there any documentation about what these bits do? The bus should
default to 2.5Mhz.

	Andrew