From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B610B1F4723; Wed, 8 Jan 2025 09:26:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736328377; cv=none; b=s/UohfJuWZJiicT3w8cdHtnAJKH8Yxldc2U8EXnaeAd/CN5erajjA/g3k/UGHneiIBMquT3jSFV9OqZobigbLlbdut2eB942AjtQxYdkk3yYk7vQEPnXjoolVWpLXCZY1Pkv2aPCHQaGtB9+Qd4+ZWCHxCMePZwAsXkJwhaCKzY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736328377; c=relaxed/simple; bh=XPJj6oXMCGezoqFdEXRGYT/4pQLrzWUSOHgwH+//EU4=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=ZJd1TkfGest5pg2MObk3PCNAmp5DLX2RnpnKpXWvcX5vQBbn3wVL2SDweaBGkH5/UfP+z3QE/MX4AbEf7kaT9cIXNZLIpXa4VdtIK8/YqCCmRoN4C2jm+YmPSawO4UAwHshGqwUQMwKOVME8v6HLAF90ZlT7aOxj5ETnyydGEnc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dn+EcWTS; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dn+EcWTS" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 27239C4CEE0; Wed, 8 Jan 2025 09:26:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736328377; bh=XPJj6oXMCGezoqFdEXRGYT/4pQLrzWUSOHgwH+//EU4=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=dn+EcWTSyAGrfXMgrdbL0WBRoRZdwOzEBKp3dPyecyMGB+Aytui87AHQTi3XLCXT8 EPNEbc7lNrg5OVwNdWLBglDkIZmcAvJFyL1NMcjC/iME3JkWEuprWeLO6OaQj3Z3s/ s3Ajr6RuoxawGcfXBS66AdPNwHbuZWCshorZeNVzgfjWwgBxORy4ztdEnXw4ayMyWX igIwB8WOToQALJPo/VfRgAeRqKWc0iJBhiFbigyMWOvY0J2U/sQxCAjB/DtqiwRvXZ ZcUsjJ+23SmHcIrUsvMCQ54dWPGYzBO+NPpUFkFl2S5bFzGvW97DLS75gvRUQOJT67 UpcIp2jiwqp1g== Message-ID: Date: Wed, 8 Jan 2025 10:26:11 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/3] soc: samsung: usi: implement support for USIv1 and exynos8895 To: Ivaylo Ivanov Cc: Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Peter Griffin , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250107113512.525001-1-ivo.ivanov.ivanov1@gmail.com> <20250107113512.525001-3-ivo.ivanov.ivanov1@gmail.com> <6y4mg6atqi6idyoppesg5owrnfrjhkzqh4im4po7urfry2qctb@yimp5y6sm7h6> <907e1169-ceea-4d41-93bb-925041de005e@gmail.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 08/01/2025 10:17, Ivaylo Ivanov wrote: > On 1/8/25 10:30, Krzysztof Kozlowski wrote: >> On Tue, Jan 07, 2025 at 01:35:11PM +0200, Ivaylo Ivanov wrote: >>> USIv1 IP-core is found on some ARM64 Exynos SoCs (like Exynos8895) and >>> provides selectable serial protocols (one of: HSI2C0, HSI2C1, HSI2C0_1, >>> SPI, UART, UART_HSI2C1). >>> >>> USIv1, unlike USIv2, doesn't have any known register map. Underlying >>> protocols that it implements have no offset, like with Exynos850. >>> Desired protocol can be chosen via SW_CONF register from System >>> Register block of the same domain as USI. >>> >>> In order to select a particular protocol, the protocol has to be >>> selected via the System Register. Unlike USIv2, there's no need for >>> any setup before the given protocol becomes accessible apart from >>> enabling the APB clock and the protocol operating clock. >>> >>> Modify the existing driver in order to allow USIv1 instances in >>> Exynos8895 to probe and set their protocol. While we're at it, >>> make use of the new mode constants in place of the old ones >>> and add a removal routine. >>> >>> Signed-off-by: Ivaylo Ivanov >>> --- >>> drivers/soc/samsung/exynos-usi.c | 108 +++++++++++++++++++++++++++---- >>> 1 file changed, 95 insertions(+), 13 deletions(-) >>> >>> diff --git a/drivers/soc/samsung/exynos-usi.c b/drivers/soc/samsung/exynos-usi.c >>> index 114352695..43c17b100 100644 >>> --- a/drivers/soc/samsung/exynos-usi.c >>> +++ b/drivers/soc/samsung/exynos-usi.c >>> @@ -16,6 +16,18 @@ >>> >>> #include >>> >>> +/* USIv1: System Register: SW_CONF register bits */ >>> +#define USI_V1_SW_CONF_NONE 0x0 >>> +#define USI_V1_SW_CONF_I2C0 0x1 >>> +#define USI_V1_SW_CONF_I2C1 0x2 >>> +#define USI_V1_SW_CONF_I2C0_1 0x3 >>> +#define USI_V1_SW_CONF_SPI 0x4 >>> +#define USI_V1_SW_CONF_UART 0x8 >>> +#define USI_V1_SW_CONF_UART_I2C1 0xa >>> +#define USI_V1_SW_CONF_MASK (USI_V1_SW_CONF_I2C0 | USI_V1_SW_CONF_I2C1 | \ >>> + USI_V1_SW_CONF_I2C0_1 | USI_V1_SW_CONF_SPI | \ >>> + USI_V1_SW_CONF_UART | USI_V1_SW_CONF_UART_I2C1) >>> + >>> /* USIv2: System Register: SW_CONF register bits */ >>> #define USI_V2_SW_CONF_NONE 0x0 >>> #define USI_V2_SW_CONF_UART BIT(0) >>> @@ -34,7 +46,8 @@ >>> #define USI_OPTION_CLKSTOP_ON BIT(2) >>> >>> enum exynos_usi_ver { >>> - USI_VER2 = 2, >>> + USI_VER1 = 1, >> Is this assignment=1 actually now helping? Isn't it creating empty item >> in exynos_usi_modes array? Basically it wastes space in the array for >> no benefits. > > I wanted to keep the USIv2 enum the same. Is there any need for keeping it the same? > >> >>> + USI_VER2, >>> }; ... >> >>> + >>> + return ret; >>> +} >>> + >>> +static void exynos_usi_remove(struct platform_device *pdev) >>> +{ >>> + struct exynos_usi *usi = platform_get_drvdata(pdev); >>> + >>> + if (usi->data->ver == USI_VER2) >>> + exynos_usi_disable(usi); >> This is not related to the patch and should be separate patch, if at >> all. > > Well I though that since didn't have any removal routine before it'd be good > to introduce that and not leave USIv2 with hwacg set. Sure, but separate commit, please. Can be preceeding the USIv1 support. Best regards, Krzysztof